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Zhixiao Zhang
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Journal Articles
- 2022
- [j3]Jinshan Yue
, Yongpan Liu
, Zhe Yuan, Xiaoyu Feng, Yifan He, Wenyu Sun
, Zhixiao Zhang, Xin Si
, Ruhui Liu
, Zi Wang, Meng-Fan Chang
, Chunmeng Dou
, Xueqing Li
, Ming Liu
, Huazhong Yang
:
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. IEEE J. Solid State Circuits 57(8): 2560-2573 (2022) - 2020
- [j2]Yen-Cheng Chiu, Zhixiao Zhang, Jia-Jing Chen, Xin Si
, Ruhui Liu
, Yung-Ning Tu, Jian-Wei Su, Wei-Hsing Huang, Jing-Hong Wang, Wei-Chen Wei, Je-Min Hung, Shyh-Shyuan Sheu, Sih-Han Li
, Chih-I Wu, Ren-Shuo Liu, Chih-Cheng Hsieh
, Kea-Tiong Tang
, Meng-Fan Chang
:
A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors. IEEE J. Solid State Circuits 55(10): 2790-2801 (2020) - 2019
- [j1]Zhixiao Zhang, Xin Si
, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Meng-Fan Chang:
Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration. IEEE Micro 39(6): 28-37 (2019)
Conference and Workshop Papers
- 2021
- [c7]Ruiqi Guo
, Hao Li, Ruhui Liu, Zhixiao Zhang, Limei Tang, Hao Sun, Leibo Liu, Meng-Fan Chang, Shaojun Wei, Shouyi Yin:
A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation. VLSI Circuits 2021: 1-2 - 2020
- [c6]Jinshan Yue, Zhe Yuan, Xiaoyu Feng, Yifan He, Zhixiao Zhang, Xin Si, Ruhui Liu, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu:
14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse. ISSCC 2020: 234-236 - [c5]Jian-Wei Su
, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Zhixiao Zhang, Hongwu Jiang, Shanshi Huang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shyh-Shyuan Sheu, Sih-Han Li, Heng-Yuan Lee, Shih-Chieh Chang, Shimeng Yu
, Meng-Fan Chang:
15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips. ISSCC 2020: 240-242 - [c4]Xin Si, Yung-Ning Tu, Wei-Hsing Huang, Jian-Wei Su
, Pei-Jung Lu, Jing-Hong Wang, Ta-Wei Liu, Ssu-Yen Wu, Ruhui Liu, Yen-Chi Chou, Zhixiao Zhang, Syuan-Hao Sie, Wei-Chen Wei, Yun-Chen Lo, Tai-Hsing Wen, Tzu-Hsiang Hsu, Yen-Kai Chen, William Shih, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Nan-Chun Lien, Wei-Chiang Shih, Yajuan He, Qiang Li, Meng-Fan Chang:
15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips. ISSCC 2020: 246-248 - 2019
- [c3]Xin Si, He Qian, Meng-Fan Chang, Cheng-Xin Xue, Jian-Wei Su, Zhixiao Zhang, Sih-Han Li, Shyh-Shyuan Sheu, Heng-Yuan Lee, Ping-Cheng Chen, Huaqiang Wu:
Circuit Design Challenges in Computing-in-Memory for AI Edge Devices. ASICON 2019: 1-4 - [c2]Zhixiao Zhang, Jia-Jing Chen, Xin Si, Yung-Ning Tu, Jian-Wei Su
, Wei-Hsing Huang, Jing-Hong Wang, Wei-Chen Wei, Yen-Cheng Chiu, Je-Min Hong, Shyh-Shyuan Sheu, Sih-Han Li, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors. A-SSCC 2019: 217-218 - 2011
- [c1]Zhixiao Zhang, Guoqing Dong, Zhaohui Peng, Zhongmin Yan:
A Framework for Incremental Deep Web Crawler Based on URL Classification. WISM (2) 2011: 302-310
Coauthor Index
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