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Journal Articles
- 2023
[j13]Naveenkumar R
, N. M. Sivamangai, Napolean A, S. Sridevi Sathya Priya, S. V. Ashika:
Design of INV/BUFF Logic Locking For Enhancing the Hardware Security. J. Electron. Test. 39(2): 141-153 (2023)- 2022
- [j12]Naveenkumar R, N. M. Sivamangai, Napolean A, G. Akashraj Nissi:
Hardware Obfuscation for IP Protection of DSP Applications. J. Electron. Test. 38(1): 9-20 (2022) - [j11]Naveenkumar R, N. M. Sivamangai, Napolean A, S. Sridevi Sathya Priya:
Design and Evaluation of XOR Arbiter Physical Unclonable Function and its Implementation on FPGA in Hardware Security Applications. J. Electron. Test. 38(6): 653-666 (2022) - 2021
- [j10]Jayaraj U. Kidav, N. M. Sivamangai, Perumal M. Pillai, Sreejeesh S. G.:
A broadband MVDR beamforming core for ultrasound imaging. Integr. 81: 221-233 (2021) - 2020
- [j9]Jayaraj U. Kidav, N. M. Sivamangai, Perumal M. Pillai:
Design of AWC core using DCD iterations for MVDR beamformer. Microprocess. Microsystems 73: 102969 (2020) - 2019
- [j8]Princy P, N. M. Sivamangai:
An Efficient Wavelet Based Transient Current Test towards Detection of Data Retention Faults in SRAM. J. Electron. Test. 35(4): 473-483 (2019) - [j7]Jayaraj U. Kidav, N. M. Sivamangai, Perumal M. Pillai, S. Raja M:
Architecture and FPGA prototype of cycle stealing DMA array signal processor for ultrasound sector imaging systems. Microprocess. Microsystems 64: 53-72 (2019) - 2017
- [j6]S. Sridevi Sathya Priya, P. Karthigaikumar, N. M. Siva Mangai, P. Kirti Gaurav Das:
An Efficient Hardware Architecture for High Throughput AES Encryptor Using MUX Based Sub Pipelined S-Box. Wirel. Pers. Commun. 94(4): 2259-2273 (2017) - [j5]S. Sridevi Sathya Priya, P. Karthigaikumar, N. M. Siva Mangai, V. Rejula:
High Throughput AES Algorithm Using Parallel Subbytes and MixColumn. Wirel. Pers. Commun. 95(2): 1433-1449 (2017) - 2015
- [j4]N. M. Siva Mangai, Shilu Tresa Vinod, D. Abraham Chandy:
Recognition of elephants in infrared images using clustering-based image segmentation. Int. J. Electron. Secur. Digit. Forensics 7(3): 234-244 (2015) - [j3]S. Sridevi Sathya Priya, P. Karthigaikumar, N. M. Siva Mangai, R. Sandhya:
Efficient hardware implementation of AES algorithm using bio metric key. Int. J. Inf. Commun. Technol. 7(4/5): 437-454 (2015) - [j2]P. Karthigaikumar, N. Anitha Christy, N. M. Siva Mangai:
PSP CO2: An Efficient Hardware Architecture for AES Algorithm for High Throughput. Wirel. Pers. Commun. 85(1): 305-323 (2015) - 2012
- [j1]S. Sridevi Sathya Priya, P. Karthigaikumar, N. M. Siva Mangai, P. T. Vanathi:
Survey on Efficient, Low-power, AES Image Encryption and Bio-cryptography Schemes. Smart Comput. Rev. 2(6): 379-390 (2012)
Conference and Workshop Papers
- 2019
- [c1]Jayaraj U. Kidav, N. M. Sivamangai, Perumal M. Pillai, Sreejeesh S. G.:
Design and Physical Implementation of Array Signal Processor ASIC for Sector Imaging Systems. VLSID 2019: 448-453
Coauthor Index
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