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2020 – today
- 2024
[j6]Andro Zamboki, Leo Gocan, Josip Mikulic, Gregor Schatzberger, Tomislav Markovic
, Adrijan Baric:
Analysis and compensation of stress effects on CMOS reference current sources. Elektrotech. Informationstechnik 141(1): 29-36 (2024)- [c26]Andro Zamboki, Leo Gocan, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Tomislav Markovic, Adrijan Baric:
Automated Optimal Resistance Measurement Method for Precision Resistor Stress Response Analysis. MIPRO 2024: 1631-1636 - [c25]Leo Gocan, Andro Zamboki, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Tomislav Markovic, Adrijan Baric:
Analysis of Wheatstone Bridge Sensitivity for Applications in Integrated Piezoresistive Stress Sensors. MIPRO 2024: 1637-1642 - 2023
- [c24]Andro Zamboki, Leo Gocan, Josip Mikulic, Niko Bako, Gregor Schatzberger, Tomislav Markovic, Adrijan Baric:
Stress-Dependent MOSFET Model for Use in Circuit Simulations. MIPRO 2023: 184-189 - [c23]Leo Gocan, Andro Zamboki, Niko Bako, Josip Mikulic, Gregor Schatzberger, Tomislav Markovic, Adrijan Baric:
Low-Power Frequency-Locked Loop Circuit with Static Frequency Offset Cancellation. MIPRO 2023: 190-195 - [c22]Ivana Frankovic, Franjo Mikic, Josip Mikulic, Niko Bako, Gregor Schatzberger, Adrijan Baric:
Measurement System for Characterization of a Resistor Array in 180-nm CMOS Technology. MIPRO 2023: 202-207 - 2022
- [c21]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Delay and Offset Compensated Relaxation Oscillator Core with Replica Integrator. MIPRO 2022: 168-173 - [c20]Andro Zamboki, Leo Gocan, Niko Bako, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Low-Power Frequency-Locked Loop Circuit with Short Settling Time. MIPRO 2022: 174-179 - 2021
- [j5]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Post-Manufacturing Process and Temperature Calibration of a 2-MHz On-Chip Relaxation Oscillator. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4076-4089 (2021) - [c19]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Self-Referenced 32-kHz Rotating Capacitor Relaxation Oscillator with Chopped Comparator Offset-Voltage Cancellation. MIPRO 2021: 1-5 - 2020
- [c18]Ivan Brezovec, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Semi-Analytical Estimation of On-Chip Intertwined Rectangular Transformer Parameters in 180 nm CMOS Technology. MIPRO 2020: 71-76 - [c17]Ivan Kuljak, Ivan Tomic, Roman Bertolan, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric:
Design and measurements of low power 32-kHz oscillators and a test interface in 180-nm CMOS technology. MIPRO 2020: 83-88 - [c16]Dubravko Tomic, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric:
Programmable low-frequency divider in 180-nm CMOS technology. MIPRO 2020: 89-92 - [c15]David Osmanovic, Ivan Skeledzija, Kresimir Spoljaric, Domagoj Tomic, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric:
Design of a tunable temperature coefficient voltage reference with low-dropout voltage regulator in 180-nm CMOS technology. MIPRO 2020: 93-98 - [c14]Ivan Porin Tolic, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Design of CMOS Temperature Sensors Based on Ring Oscillators in 180-nm and 110-nm technology. MIPRO 2020: 104-108
2010 – 2019
- 2019
- [j4]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
A 1-MHz Relaxation Oscillator Core Employing a Self-Compensating Chopped Comparator Pair. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1728-1736 (2019) - [c13]Ivan Porin Tolic, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Design of Sense Amplifiers for Non-Volatile Memory. MIPRO 2019: 59-64 - [c12]Ivan Brezovec, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Design Methodology of an On-Chip Inductor in 180 nm CMOS Technology. MIPRO 2019: 65-69 - 2018
- [c11]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
A 1-MHz Relaxation Oscillator Core Employing a Self-Compensating Chopped Comparator Pair. ISCAS 2018: 1-4 - [c10]Gregor Schatzberger, Friedrich Peter Leisenberger, Peter Sarson, Andreas Wiesner:
High efficient low cost EEPROM screening method in combination with an area optimized byte replacement strategy which enables high reliability EEPROMs. VTS 2018: 1-6 - 2017
- [j3]Peter G. Sarson, Gregor Schatzberger, Friedrich Peter Leisenberger:
Fast Bit Screening of Automotive Grade EEPROMs - Continuous Improvement Exercise. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1250-1260 (2017) - [c9]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
A 1-MHz on-chip relaxation oscillator with comparator delay cancelation. ESSCIRC 2017: 95-98 - [c8]Josip Mikulic, Peter Sarson, Gregor Schatzberger, Adrijan Baric:
Fault-based test methodology for analog amplifier circuits. EWDTS 2017: 1-7 - [c7]Ivan Brezovec, Marko Magerl, Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Characterization of measurement system for high-precision oscillator measurements. MIPRO 2017: 88-92 - [c6]Josip Mikulic, Ivan Brezovec, Marko Magerl, Gregor Schatzberger, Adrijan Baric:
Temperature calibration of an on-chip relaxation oscillator. MIPRO 2017: 93-97 - 2016
- [j2]Friedrich Peter Leisenberger, Gregor Schatzberger:
An Efficient Contact Screening Method and its Application to High-Reliability Non-Volatile Memories. J. Electron. Test. 32(4): 447-458 (2016) - [c5]Chun-Kai Hsu, Peter Sarson, Gregor Schatzberger, Friedrich Peter Leisenberger, John M. Carulli Jr., Siddhartha Siddhartha, Kwang-Ting Cheng:
Variation and failure characterization through pattern classification of test data from multiple test stages. ITC 2016: 1-10 - [c4]Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
Relaxation oscillator calibration technique with comparator delay regulation. MIPRO 2016: 57-61 - [c3]Gregor Schatzberger, Friedrich Peter Leisenberger, Peter Sarson:
Yield improvement of an EEPROM for automotive applications while maintaining high reliability. VTS 2016: 1-6 - 2013
- [c2]Peter Sarson, Gregor Schatzberger, Robert Seitz:
Automotive EEPROM Qualification and Cost Optimization. Asian Test Symposium 2013: 105-106
2000 – 2009
- 2008
- [j1]Martin Schrems, Martin Knaipp, Hubert Enichlmair, Verena Vescoli, Rainer Minixhofer, Ehrenfried Seebacher, Friedrich Peter Leisenberger, Ewald Wachmann, Gregor Schatzberger, Heimo Gensinger:
Scalable High Voltage CMOS technology for Smart Power and sensor applications. Elektrotech. Informationstechnik 125(4): 109-117 (2008) - 2006
- [c1]M. Thomas, J. Pathak, J. Payne, Friedrich Peter Leisenberger, Ewald Wachmann, Gregor Schatzberger, Andreas Wiesner, Martin Schrems:
A Non-Volatile Embedded Memory for High Temperature Automotive and High-Retention Applications. ISQED 2006: 591-596
Coauthor Index
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