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Duc-Hung Le
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2020 – today
- 2024
- [c23]Trung-Khanh Le, Trong-Tu Bui, Duc-Hung Le:
A Probability Method to Estimate the State of a Digital Resonate-And-Fire Neuron without Running a Simulation. ISCAS 2024: 1-5 - [c22]Thai-Ha Tran, Van-Phuc Hoang, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham:
An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode. ISCAS 2024: 1-5 - 2023
- [j16]Trung-Khanh Le, Trong-Tu Bui, Duc-Hung Le:
Modeling and Designing of an All-Digital Resonate-and-Fire Neuron Circuit. IEEE Access 11: 62318-62336 (2023) - [j15]Khai-Minh Ma, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang:
Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA. Future Internet 15(5): 186 (2023) - [j14]Duc-Hung Le, The-Hung Pham:
Design of a 1.8-µVrms IRN 180-dB CMRR configurable low-noise 6-channel analog front-end for neural recording systems on 180nm CMOS process. IEICE Electron. Express 20(13): 20230218 (2023) - [j13]Hong-Hai Thai, Cong-Kha Pham, Duc-Hung Le:
Design of a Low-Power and Low-Area 8-Bit Flash ADC Using a Double-Tail Comparator on 180 nm CMOS Process. Sensors 23(1): 76 (2023) - 2020
- [j12]Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham:
Quick Boot of Trusted Execution Environment With Hardware Accelerators. IEEE Access 8: 74015-74023 (2020) - [j11]Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham:
Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB). IEICE Electron. Express 17(20): 20200282 (2020)
2010 – 2019
- 2019
- [j10]Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham:
A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC. IEICE Electron. Express 16(10): 20190116 (2019) - [j9]Trong-Thuc Hoang, Xuan-Thuan Nguyen, Duc-Hung Le, Cong-Kha Pham:
Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1723-1727 (2019) - [c21]Ngoc-Tu Bui, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham:
A 0.75-V 32-MHz 181-µW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC. ICIT 2019: 835-840 - [c20]Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham:
Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter. ISCAS 2019: 1 - 2018
- [j8]Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham:
Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC. IEICE Electron. Express 15(10): 20180302 (2018) - [c19]Trong-Thuc Hoang, Cong-Kha Pham, Duc-Hung Le:
High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC. ISCAS 2018: 1-5 - [c18]Phuc-Vinh Nguyen, Thi-Thu-Trang Tran, Phuoc-Loc Diep, Duc-Hung Le:
A Low-Power ASIC Implementation of Multi-Core OpenSPARC T1 Processor on 90nm CMOS Process. MCSoC 2018: 95-100 - [c17]Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham:
VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations. MCSoC 2018: 225-232 - 2017
- [j7]Tien-Dung Nguyen, Thach-Phat Chiem, Trong Hai Duong, Duc-Hung Le, Xuan-An Nguyen:
On improving agricultural IoT management process for fault detection. J. Inf. Telecommun. 1(3): 208-223 (2017) - [c16]Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham:
FPGA-based frequent items counting using matrix of equality comparators. MWSCAS 2017: 285-288 - [c15]Swarup Kumar Mohalik, Nanjangud C. Narendra, Ramamurthy Badrinath, Duc-Hung Le:
Adaptive Service-Oriented Architectures for Cyber Physical Systems. SOSE 2017: 57-62 - [i1]Xuan-Thuan Nguyen, Trong-Tu Bui, Huu-Thuan Huynh, Duc-Hung Le, Cong-Kha Pham:
A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller. CoRR abs/1712.03477 (2017) - 2016
- [j6]Tien-Dung Cao, Tran Vu Pham, Quang Hieu Vu, Hong Linh Truong, Duc-Hung Le, Schahram Dustdar:
MARSA: A Marketplace for Realtime Human Sensing Data. ACM Trans. Internet Techn. 16(3): 16:1-16:21 (2016) - [c14]Duc-Hung Le, Nanjangud C. Narendra, Hong Linh Truong:
HINC - Harmonizing Diverse Resource Information across IoT, Network Functions, and Clouds. FiCloud 2016: 317-324 - [c13]Hong Linh Truong, Georgiana Copil, Schahram Dustdar, Duc-Hung Le, Daniel Moldovan, Stefan Nastic:
On Engineering Analytics for Elastic IoT Cloud Platforms. ICSOC 2016: 267-281 - [c12]Trong-Thuc Hoang, Duc-Hung Le, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
A hybrid adaptive CORDIC in 65nm SOTB CMOS process. ISCAS 2016: 2158-2161 - [c11]Duc-Hung Le, Hong Linh Truong, Schahram Dustdar:
Managing On-Demand Sensing Resources in IoT Cloud Systems. IEEE MS 2016: 65-72 - 2015
- [j5]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham:
Low-resource low-latency hybrid adaptive CORDIC with floating-point precision. IEICE Electron. Express 12(9): 20150258 (2015) - [j4]Trong-Thuc Hoang, Hong-Kiet Su, Hieu-Binh Nguyen, Duc-Hung Le, Huu-Thuan Huynh, Trong-Tu Bui, Cong-Kha Pham:
Design of co-processor for real-time HMM-based text-to-speech on hardware system applied to Vietnamese. IEICE Electron. Express 12(14): 20150448 (2015) - [c10]Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Xuan-Thuan Nguyen, Koichiro Ishibashi, Cong-Kha Pham:
Design of a low-power fixed-point 16-bit digital signal processor using 65nm SOTB process. ICICDT 2015: 1-4 - [c9]Tien-Dung Nguyen, Hong Linh Truong, Georgiana Copil, Duc-Hung Le, Daniel Moldovan, Schahram Dustdar:
On Developing and Operating of Data Elasticity Management Process. ICSOC 2015: 105-119 - [c8]Hong Linh Truong, Georgiana Copil, Schahram Dustdar, Duc-Hung Le, Daniel Moldovan, Stefan Nastic:
iCOMOT - A Toolset for Managing IoT Cloud Systems. MDM (1) 2015: 299-302 - 2014
- [j3]Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham:
A CAM-Based Information Detection Hardware System for Fast Image Matching on FPGA. IEICE Trans. Electron. 97-C(1): 65-76 (2014) - [c7]Duc-Hung Le, Hong Linh Truong, Georgiana Copil, Stefan Nastic, Schahram Dustdar:
SALSA: A Framework for Dynamic Configuration of Cloud Services. CloudCom 2014: 146-153 - [c6]Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc-Hung Le, Takumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa:
A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. COOL Chips 2014: 1-3 - [c5]Stefan Nastic, Sanjin Sehic, Duc-Hung Le, Hong Linh Truong, Schahram Dustdar:
Provisioning Software-Defined IoT Cloud Systems. FiCloud 2014: 288-295 - [c4]Hong Linh Truong, Schahram Dustdar, Georgiana Copil, Alessio Gambi, Waldemar Hummer, Duc-Hung Le, Daniel Moldovan:
CoMoT - A Platform-as-a-Service for Elasticity in the Cloud. IC2E 2014: 619-622 - 2013
- [j2]Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham:
Design a Fast CAM-Based Exact Pattern Matching System on FPGA and 0.18µm CMOS Process. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(9): 1883-1888 (2013) - [c3]Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham:
A fast CAM-based Watermarking extraction on FPGA. ICICDT 2013: 207-210 - [c2]Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham:
A fast CAM-based image matching system on FPGA. ISCAS 2013: 1797-1800 - [c1]Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham:
A CAM-based Information Detection Hardware System for fast exact pattern matching. MWSCAS 2013: 848-851 - 2012
- [j1]Duc-Hung Le, Katsumi Inoue, Masahiro Sowa, Cong-Kha Pham:
An FPGA-Based Information Detection Hardware System Employing Multi-Match Content Addressable Memory. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(10): 1708-1717 (2012)
Coauthor Index
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last updated on 2024-10-07 22:05 CEST by the dblp team
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