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Lew Chua-Eoan

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Journal Articles

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2013
[j2]
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  - journals/cm/ChienXC13
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  - https://dblp.org/rec/journals/cm/ChienXC13
Charles Chien, Zhiwei Xu, Lew Chua-Eoan:
Topics in integrated circuits for communications [Series Editorial]. IEEE Commun. Mag. 51(4): 92-93 (2013)
2009
[j1]
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Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng:
Efficient Power Network Analysis Considering Multidomain Clock Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1348-1358 (2009)

Conference and Workshop Papers

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2012
[c5]
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  - conf/isscc/Chua-EoanY12
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Lew Chua-Eoan, Se-Hyun Yang:
Session 10 overview: High-performance digital: High performance digital subcommittee. ISSCC 2012: 176-177
2011
[c4]
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  - conf/isscc/NollSSLSCWNS11
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Tobias Noll, Raney Southerland, Vladimir Stojanovic, Sonia Leon, Lew Chua-Eoan, Alice Wang, Byeong-Gyu Nam, Masaya Sumita:
Design of "green" high-performance processor circuits. ISSCC 2011: 518-519
2009
[c3]
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  - conf/isqed/AraniHPYZCPCCK09
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Amirali Shayan Arani, Xiang Hu, He Peng, Wenjian Yu, Wanping Zhang, Chung-Kuan Cheng, Mikhail Popovich, Xiaoming Chen, Lew Chua-Eoan, Xiaohua Kong:
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. ISQED 2009: 576-581
2008
[c2]
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  - conf/date/ZhangZYZSPZCMSIC08
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Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng:
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network. DATE 2008: 537-540
2007
[c1]
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  - conf/iccd/ZhangZSPZCMSIC07
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Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng:
Fast power network analysis with multiple clock domains. ICCD 2007: 456-463

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