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Paulo Sérgio B. do Nascimento
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2010 – 2019
- 2013
- [j1]Paulo Sérgio B. do Nascimento, Helber E. P. de Souza
, Francisco A. S. Neves
, Leonardo R. Limongi
:
FPGA Implementation of the Generalized Delayed Signal Cancelation - Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals. IEEE Trans. Ind. Electron. 60(2): 645-658 (2013) - 2012
- [c12]Paulo Sérgio B. do Nascimento, Francisco A. S. Neves
, Helber E. P. de Souza, Marco A. O. Domingues:
FPGA design methodology for DSP industrial applications - A case study of a three-phase positive-sequence detector. SBCCI 2012: 1-6
2000 – 2009
- 2008
- [c11]Paulo Sérgio Brandão do Nascimento, Victor Wanderley Costa de Medeiros, Viviane Lucy Santos de Souza, Abner Corrêa Barros, Manoel Eusébio de Lima:
A Temporal Partitioning Methodology for Reconfigurable High Performance Computers. ReConFig 2008: 307-312 - [c10]Abner Corrêa Barros, Victor Wanderley Costa de Medeiros, Viviane Lucy Santos de Souza, Paulo Sérgio Brandão do Nascimento, Ângelo Mazer, João Paulo Fernandes Barbosa, Bruno P. Neves, Ismael Santos
, Manoel Eusébio de Lima:
Implementation of a double-precision multiplier accumulator with exception treatment to a dense matrix multiplier module in FPGA. SBCCI 2008: 40-45 - 2007
- [c9]Jordana L. Seixas, Edson Barbosa, Stelita M. da Silva, Paulo Sérgio B. do Nascimento, Vinícius Kursancew, Remy Eskinazi Sant'Anna, Edna Barros
, Manoel Eusébio de Lima:
Aquarius: a dynamically reconfigurable computing platform. SBCCI 2007: 171-176 - 2006
- [c8]Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima:
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures. DATE 2006: 375-380 - [c7]Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima, Stelita M. da Silva, Jordana L. Seixas:
Mapping of image processing systems to FPGA computer based on temporal partitioning and design space exploration. SBCCI 2006: 50-55 - 2005
- [c6]Remy Eskinazi Sant'Anna, Manoel Eusébio de Lima, Paulo Romero Martins Maciel, Carlos A. Valderrama, Abel Guilhermino Silva-Filho, Paulo Sérgio B. do Nascimento:
A petri-net based Pre-runtime scheduler for dynamically self-reconfiguration of FPGAs (abstract only). FPGA 2005: 262 - [c5]Paulo Sérgio B. do Nascimento, Paulo Romero Martins Maciel, Manoel Eusébio de Lima, Remy Eskinazi Sant'Anna, Abel Guilhermino Silva-Filho:
A partial reconfigurable FPGA implementation for industrial controllers using SFC-petri net description (abstract only). FPGA 2005: 275 - [c4]Abel G. Silva-Filho, Remy Eskinazi Sant'Anna, Paulo Sérgio Brandão do Nascimento, Manoel Eusébio de Lima:
An Energy-Aware Exploration Approach Based on Open Software Environment. IESS 2005: 97-102 - [c3]Remy Eskinazi Sant'Anna, Manoel Eusébio de Lima, Paulo Romero Martins Maciel, Carlos A. Valderrama, Abel Guilhermino Silva-Filho, Paulo Sérgio B. do Nascimento:
A Timed Petri Net Approach for Pre-Runtime Scheduling in Partial and Dynamic Reconfigurable Systems. IPDPS 2005 - 2004
- [c2]Paulo Sérgio B. do Nascimento, Paulo Romero Martins Maciel, Manoel Eusébio de Lima, Remy Eskinazi Sant'Anna, Abel Guilhermino Silva-Filho:
A partial reconfigurable architecture for controllers based on Petri nets. SBCCI 2004: 16-21 - 2002
- [c1]Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima, Paulo Maciel:
CDFG -Petri Net Temporal Partitioning for Switching Context Applications. SBCCI 2002: 235-242
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