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ORCIDYu Ji 0002
Person information
- unicode name: 季宇
- affiliation: University of California Santa Barbara, CA, USA
- affiliation (PhD 2020): Tsinghua University, Department of Computer Science and Technology, Beijing, China
Other persons with the same name
- Yu Ji — disambiguation page
- Yu Ji 0001
![[0009-0006-6032-7736]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0009-0006-6032-7736")
— DGene, Inc. (and 2 more) - Yu Ji 0003 — Tsinghua University, Institute of Nuclear and New Energy Technology, Beijing, China
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2020 – today
- 2022
[j6]Xing Hu, Ling Liang, Xiaobing Chen, Lei Deng, Yu Ji, Yufei Ding, Zidong Du, Qi Guo, Timothy Sherwood, Yuan Xie:
A Systematic View of Model Leakage Risks in Deep Neural Network Systems. IEEE Trans. Computers 71(12): 3254-3267 (2022)- 2021
- [j5]Yu Ji, Zixin Liu, Youhui Zhang:
A Reduced Architecture for ReRAM-Based Neural Network Accelerator and Its Software Stack. IEEE Trans. Computers 70(3): 316-331 (2021) - 2020
- [j4]Xinfeng Xie, Xing Hu, Peng Gu, Shuangchen Li, Yu Ji, Yuan Xie:
NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs. ACM Trans. Archit. Code Optim. 17(4): 31:1-31:25 (2020) - [c11]Xing Hu, Ling Liang, Shuangchen Li, Lei Deng, Pengfei Zuo, Yu Ji, Xinfeng Xie, Yufei Ding, Chang Liu, Timothy Sherwood, Yuan Xie:
DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints. ASPLOS 2020: 385-399
2010 – 2019
- 2019
- [j3]Xinfeng Xie, Xing Hu, Peng Gu, Shuangchen Li, Yu Ji, Yuan Xie:
NNBench-X: Benchmarking and Understanding Neural Network Workloads for Accelerator Designs. IEEE Comput. Archit. Lett. 18(1): 38-42 (2019) - [c10]Yu Ji, Youyang Zhang, Xinfeng Xie, Shuangchen Li, Peiqi Wang, Xing Hu, Youhui Zhang, Yuan Xie:
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. ASPLOS 2019: 733-747 - [c9]Yang Zhao, Xing Hu, Shuangchen Li, Jing Ye, Lei Deng, Yu Ji, Jianyu Xu, Dong Wu, Yuan Xie:
Memory Trojan Attack on Neural Network Accelerators. DATE 2019: 1415-1420 - [c8]Xinfeng Xie, Xing Hu, Peng Gu, Shuangchen Li, Yu Ji, Yuan Xie:
NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs. EMC2@HPCA/CVPR/ISCA 2019: 11-15 - [i6]Yu Ji, Zixin Liu, Xing Hu, Peiqi Wang, Youhui Zhang:
Programmable Neural Network Trojan for Pre-Trained Feature Extractor. CoRR abs/1901.07766 (2019) - [i5]Peiqi Wang, Dongsheng Wang, Yu Ji, Xinfeng Xie, Haoxuan Song, XuXin Liu, Yongqiang Lyu, Yuan Xie:
QGAN: Quantized Generative Adversarial Networks. CoRR abs/1901.08263 (2019) - [i4]Yu Ji, Youyang Zhang, Xinfeng Xie, Shuangchen Li, Peiqi Wang, Xing Hu, Youhui Zhang, Yuan Xie:
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. CoRR abs/1901.09904 (2019) - [i3]Xing Hu, Ling Liang, Lei Deng, Shuangchen Li, Xinfeng Xie, Yu Ji, Yufei Ding, Chang Liu, Timothy Sherwood, Yuan Xie:
Neural Network Model Extraction Attacks in Edge Devices by Hearing Architectural Hints. CoRR abs/1903.03916 (2019) - 2018
- [j2]Ling Liang, Lei Deng, Yueling Zeng, Xing Hu, Yu Ji, Xin Ma, Guoqi Li, Yuan Xie:
Crossbar-Aware Neural Network Pruning. IEEE Access 6: 58324-58337 (2018) - [c7]Yu Ji, Youhui Zhang, Wenguang Chen, Yuan Xie:
Bridge the Gap between Neural Networks and Neuromorphic Hardware with a Neural Network Compiler. ASPLOS 2018: 448-460 - [c6]Peiqi Wang, Yu Ji, Chi Hong, Yongqiang Lyu, Dongsheng Wang, Yuan Xie:
SNrram: an efficient sparse neural network computation architecture based on resistive random-access memory. DAC 2018: 106:1-106:6 - [c5]Yu Ji, Ling Liang, Lei Deng, Youyang Zhang, Youhui Zhang, Yuan Xie:
TETRIS: TilE-matching the TRemendous Irregular Sparsity. NeurIPS 2018: 4119-4129 - [i2]Yu Ji, Youhui Zhang, Wenguang Chen, Yuan Xie:
Bridging the Gap Between Neural Networks and Neuromorphic Hardware with A Neural Network Compiler. CoRR abs/1801.00746 (2018) - [i1]Ling Liang, Lei Deng, Yueling Zeng, Xing Hu, Yu Ji, Xin Ma, Guoqi Li, Yuan Xie:
Crossbar-aware neural network pruning. CoRR abs/1807.10816 (2018) - 2017
- [c4]Yu Ji, Youhui Zhang, Wenguang Chen, Yuan Xie:
POSTER: Bridge the Gap Between Neural Networks and Neuromorphic Hardware. PACT 2017: 148-149 - 2016
- [j1]Yu Ji, Youhui Zhang, Weimin Zheng:
Modelling Spiking Neural Network from the Architecture Evaluation Perspective. J. Comput. Sci. Technol. 31(1): 50-59 (2016) - [c3]Youhui Zhang, Yu Ji, Wenguang Chen, Yuan Xie:
Neural network transformation under hardware constraints. CASES 2016: 8:1 - [c2]Yu Ji, Youhui Zhang, He Liu, Weimin Zheng:
Optimized Mapping Spiking Neural Networks onto Network-on-Chip. ICA3PP 2016: 38-52 - [c1]Yu Ji, Youhui Zhang, Shuangchen Li, Ping Chi, Cihang Jiang, Peng Qu, Yuan Xie, Wenguang Chen:
NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints. MICRO 2016: 21:1-21:13
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