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ORCIDBart R. Zeydel
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2010 – 2019
- 2010
[j4]Bart R. Zeydel, Dursun Baran
, Vojin G. Oklobdzija:
Energy-Efficient Design Methodologies: High-Performance VLSI Adders. IEEE J. Solid State Circuits 45(6): 1220-1233 (2010)
2000 – 2009
- 2007
- [c10]Mandeep Singh, Christophe Giacomotto, Bart R. Zeydel, Vojin G. Oklobdzija:
Logic Style Comparison for Ultra Low Power Operation in 65nm Technology. PATMOS 2007: 181-190 - 2006
- [j3]Steven K. Hsu, Sanu K. Mathew, Mark A. Anders, Bart R. Zeydel, Vojin G. Oklobdzija, Ram K. Krishnamurthy, Shekhar Y. Borkar:
A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS. IEEE J. Solid State Circuits 41(1): 256-264 (2006) - [j2]Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija:
Energy optimization of pipelined digital systems using circuit sizing and supply scaling. IEEE Trans. Very Large Scale Integr. Syst. 14(2): 122-134 (2006) - [c9]Xiao Yan Yu, Robert K. Montoye, Kevin J. Nowka, Bart R. Zeydel, Vojin G. Oklobdzija:
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. PATMOS 2006: 47-55 - [c8]Bart R. Zeydel, Vojin G. Oklobdzija:
Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations. PATMOS 2006: 127-136 - [c7]Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija:
Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design. PATMOS 2006: 148-156 - 2005
- [j1]Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy:
Comparison of high-performance VLSI adders in the energy-delay space. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 754-758 (2005) - [c6]Bart R. Zeydel, Theo T. J. H. Kluter, Vojin G. Oklobdzija:
Efficient Mapping of Addition Recurrence Algorithms in CMOS. IEEE Symposium on Computer Arithmetic 2005: 107-113 - [c5]Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija:
Architectural Considerations for Energy Efficiency. ICCD 2005: 13-16 - [c4]Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija:
Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. ICCD 2005: 249-252 - 2003
- [c3]Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy:
Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. IEEE Symposium on Computer Arithmetic 2003: 272-279 - [c2]Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija:
Energy minimization method for optimal energy-delay extraction. ESSCIRC 2003: 177-180 - [c1]Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija:
Energy Optimization of High-Performance Circuits. PATMOS 2003: 399-408
Coauthor Index
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