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ORCIDShih-Ying Liu
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2010 – 2019
- 2015
[c9]Shih-Ying Liu, Tung-Chieh Chen, Hung-Ming Chen:
An approach to anchoring and placing high performance custom digital designs. ASP-DAC 2015: 384-389- [c8]Chun-Kai Wang, Chuan-Chia Huang, Shih-Ying Sean Liu, Ching-Yu Chin, Sheng-Te Hu, Wei-Chen Wu, Hung-Ming Chen:
Closing the Gap between Global and Detailed Placement: Techniques for Improving Routability. ISPD 2015: 149-156 - 2014
- [j3]Shih-Ying Sean Liu, Chung-Hung Chang, Hung-Ming Chen, Tsung-Yi Ho
:
ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1316-1327 (2014) - [j2]Shih-Ying Sean Liu, Ren-Guo Luo, Suradeth Aroonsantidecha, Ching-Yu Chin, Hung-Ming Chen:
Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1404-1415 (2014) - [c7]Hsin-Chun Lin, Shih-Ying Sean Liu, Hung-Ming Chen:
Planning and placing power clamps for effective CDM protection. ICCAD 2014: 663-669 - 2013
- [j1]Shih-Ying Sean Liu, Wan-Ting Lo, Chieh-Jui Lee, Hung-Ming Chen:
Agglomerative-based flip-flop merging and relocation for signal wirelength and clock tree optimization. ACM Trans. Design Autom. Electr. Syst. 18(3): 40:1-40:20 (2013) - [c6]Shih-Ying Sean Liu, Chieh-Jui Lee, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee:
Effective power network prototyping via statistical-based clustering and sequential linear programming. DATE 2013: 1701-1706 - [c5]Shih-Ying Sean Liu, Ren-Guo Luo, Hung-Ming Chen:
A network-flow based algorithm for power density mitigation at post-placement stage. DATE 2013: 1707-1710 - 2012
- [c4]Suradeth Aroonsantidecha, Shih-Ying Liu, Ching-Yu Chin, Hung-Ming Chen:
A fast thermal aware placement with accurate thermal analysis based on Green function. ASP-DAC 2012: 425-430 - [c3]Shih-Ying Liu, Chieh-Jui Lee, Hung-Ming Chen:
Agglomerative-based flip-flop merging with signal wirelength optimization. DATE 2012: 1391-1396 - [c2]Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee:
Hierarchical power network synthesis for multiple power domain designs. ISQED 2012: 477-482 - 2011
- [c1]Yi-Rong Chen, Hung-Ming Chen, Shih-Ying Liu:
TSV-based 3D-IC placement for timing optimization. SoCC 2011: 290-295
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