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Kubilay Atasu
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Publications
- 2023
- [j15]Jovan Blanusa, Kubilay Atasu, Paolo Ienne:
Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-constrained Cycles. ACM Trans. Parallel Comput. 10(3): 15:1-15:35 (2023) - [i10]Jovan Blanusa, Kubilay Atasu, Paolo Ienne:
Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-Constrained Cycles. CoRR abs/2301.01068 (2023) - 2022
- [c25]Jovan Blanusa, Paolo Ienne, Kubilay Atasu:
Scalable Fine-Grained Parallel Cycle Enumeration Algorithms. SPAA 2022: 247-258 - [i7]Jovan Blanusa, Paolo Ienne, Kubilay Atasu:
Scalable Fine-Grained Parallel Cycle Enumeration Algorithms. CoRR abs/2202.09685 (2022) - 2020
- [j13]Jovan Blanusa, Radu Stoica, Paolo Ienne, Kubilay Atasu:
Many-Core Clique Enumeration with Fast Set Intersections. Proc. VLDB Endow. 13(11): 2676-2690 (2020) - [c24]Jovan Blanusa, Radu Stoica, Paolo Ienne, Kubilay Atasu:
Parallelizing Maximal Clique Enumeration on Modern Manycore Processors. IPDPS Workshops 2020: 211-214 - 2006
- [j2]Laura Pozzi, Kubilay Atasu, Paolo Ienne:
Exact and approximate algorithms for the extension of embedded processor instruction sets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(7): 1209-1229 (2006) - 2004
- [c3]Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt:
Introduction of local memory elements in instruction set extensions. DAC 2004: 729-734 - 2003
- [j1]Kubilay Atasu, Laura Pozzi, Paolo Ienne:
Automatic Application-Specific Instruction-Set Extensions Under Microarchitectural Constraints. Int. J. Parallel Program. 31(6): 411-428 (2003) - [c1]Kubilay Atasu, Laura Pozzi, Paolo Ienne:
Automatic application-specific instruction-set extensions under microarchitectural constraints. DAC 2003: 256-261
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