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Vítor Silva 0001
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Publications
- 2022
- [j35]Oscar Ferraz, Srinivasan Subramaniyan, Ramesh Chinthalaa, João Andrade, Joseph R. Cavallaro, Soumitra Kumar Nandy, Vítor Silva, Xinmiao Zhang, Madhura Purnaprajna, Gabriel Falcão:
A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. IEEE Commun. Surv. Tutorials 24(1): 524-556 (2022) - 2017
- [j26]João Andrade, Nithin George, Kimon Karras, David Novo, Frederico Pratas, Leonel Sousa, Paolo Ienne, Gabriel Falcão, Vítor Silva:
Design Space Exploration of LDPC Decoders Using High-Level Synthesis. IEEE Access 5: 14600-14615 (2017) - 2016
- [j24]João Andrade, Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, Leonel Sousa:
A Survey on Programmable LDPC Decoders. IEEE Access 4: 6704-6718 (2016) - [j22]Nuno Vicente, Vítor Silva, João Andrade, Gabriel Falcão:
Mobile 4K / 2K / HD video streaming supported by real-time FEC raptorQ codes. IEEE Trans. Consumer Electron. 62(4): 405-411 (2016) - 2015
- [c67]Jiandong Mu, Aida Vosoughi, João Andrade, Alexios Balatsoukas-Stimming, Georgios Karakonstantis, Andreas Burg, Gabriel Falcão, Vítor Manuel Mendes da Silva, Joseph R. Cavallaro:
The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. ACSSC 2015: 1627-1631 - [c66]João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes:
Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. FCCM 2015: 97 - [c65]João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes:
From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. FPL 2015: 1-8 - [c63]João Andrade, Gabriel Falcão, Vítor Manuel Mendes da Silva:
Accelerating and deceleratingmin-sum-based gear-shift LDPC decoders. ICASSP 2015: 3004-3008 - 2014
- [j20]João Andrade, Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva:
Optimized Fast Walsh-Hadamard Transform on GPUs for non-binary LDPC decoding. Parallel Comput. 40(9): 449-453 (2014) - [c57]João Andrade, Aida Vosoughi, Guohui Wang, Georgios Karakonstantis, Andreas Burg, Gabriel Falcão, Vítor Manuel Mendes da Silva, Joseph R. Cavallaro:
On the performance of LDPC and turbo decoder architectures with unreliable memories. ACSSC 2014: 542-547 - [c56]João Andrade, Frederico Pratas, Gabriel Falcão, Vítor Manuel Mendes da Silva, Leonel Sousa:
Combining flexibility with low power: Dataflow and wide-pipeline LDPC decoding engines in the Gbit/s era. ASAP 2014: 264-269 - [c54]João Andrade, Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, Kenta Kasai:
Flexible non-binary LDPC decoding on FPGAs. ICASSP 2014: 1936-1940 - 2013
- [c49]João Andrade, Vítor Manuel Mendes da Silva, Gabriel Falcão Paiva Fernandes:
From OpenCL to gates: The FFT. GlobalSIP 2013: 1238-1241 - [c48]Frederico Pratas, João Andrade, Gabriel Falcão, Vítor Manuel Mendes da Silva, Leonel Sousa:
Open the Gates: Using High-level Synthesis towards programmable LDPC decoders on FPGAs. GlobalSIP 2013: 1274-1277 - [c47]João Andrade, Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, Kenta Kasai:
FFT-SPA non-binary LDPC decoding on GPU. ICASSP 2013: 5099-5103 - [c46]João Andrade, Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, João Pedro Barreto, Nuno Gonçalves, Valentin Savin:
Near-LSPA performance at MSA complexity. ICC 2013: 3281-3285 - [c44]Gabriel Falcão Paiva Fernandes, João Andrade, Vítor Manuel Mendes da Silva, Shinichi Yamagiwa, Leonel Sousa:
Stressing the BER simulation of LDPC codes in the error floor region using GPU clusters. ISWCS 2013: 1-5 - 2012
- [j17]Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, Leonel Sousa, João Andrade:
Portable LDPC Decoding on Multicores Using OpenCL [Applications Corner]. IEEE Signal Process. Mag. 29(4): 81-109 (2012) - 2011
- [c36]Gabriel Falcão Paiva Fernandes, João Andrade, Vítor Manuel Mendes da Silva, Leonel Sousa:
Real-time DVB-S2 LDPC decoding on many-core GPU accelerators. ICASSP 2011: 1685-1688
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