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ORCIDYunheung Paek
- > Home > Persons > Yunheung Paek
Publications
- 2014
[c49]Jinyong Lee, Jongwon Lee, Jongeun Lee, Yunheung Paek:
Improving performance of loops on DIAM-based VLIW architectures. LCTES 2014: 135-144- 2013
- [j26]Jonghee W. Yoon, Jongeun Lee, Sanghyun Park, Yongjoo Kim, Jinyong Lee, Yunheung Paek, Doosan Cho:
Architecture customization of on-chip reconfigurable accelerators. ACM Trans. Design Autom. Electr. Syst. 18(4): 52:1-52:22 (2013) - 2012
- [j25]Yongjoo Kim, Jongeun Lee, Toan X. Mai, Yunheung Paek:
Improving performance of nested loops on reconfigurable array processors. ACM Trans. Archit. Code Optim. 8(4): 32:1-32:23 (2012) - [c44]Yongjoo Kim, Jongeun Lee, Jinyong Lee, Toan X. Mai, Ingoo Heo, Yunheung Paek:
Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture. ARC 2012: 40-52 - 2011
- [j24]Jonghee M. Youn
, Jongwon Lee, Yunheung Paek, Jongeun Lee, Hanno Scharwächter, Rainer Leupers:
Fast graph-based instruction selection for multi-output instructions. Softw. Pract. Exp. 41(6): 717-736 (2011) - [j23]Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee W. Yoon, Doosan Cho, Yunheung Paek:
High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1599-1609 (2011) - [j22]Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek:
Memory access optimization in compilation for coarse-grained reconfigurable architectures. ACM Trans. Design Autom. Electr. Syst. 16(4): 42:1-42:27 (2011) - [c39]Jonghee W. Yoon, Jongeun Lee, Jaewan Jung, Sanghyun Park, Yongjoo Kim, Yunheung Paek, Doosan Cho:
I2CRF: Incremental interconnect customization for embedded reconfigurable fabrics. DATE 2011: 1346-1351 - 2010
- [c37]Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee W. Yoon, Yunheung Paek:
Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays. HiPEAC 2010: 171-185 - [c36]Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek:
Operation and data mapping for CGRAs with multi-bank memory. LCTES 2010: 17-26
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