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ORCIDColin C. Murphy
- > Home > Persons > Colin C. Murphy
Publications
- 2024
[j21]Dominic Lightbody
, Duc-Minh Ngo, Andriy Temko, Colin C. Murphy, Emanuel M. Popovici:
Dragon_Pi: IoT Side-Channel Power Data Intrusion Detection Dataset and Unsupervised Convolutional Autoencoder for Intrusion Detection. Future Internet 16(3): 88 (2024)- 2023
- [j20]Duc-Minh Ngo, Dominic Lightbody, Andriy Temko, Cuong Pham-Quoc, Ngoc-Thinh Tran, Colin C. Murphy, Emanuel M. Popovici:
HH-NIDS: Heterogeneous Hardware-Based Network Intrusion Detection Framework for IoT Security. Future Internet 15(1): 9 (2023) - [j19]Dominic Lightbody, Duc-Minh Ngo, Andriy Temko, Colin C. Murphy, Emanuel M. Popovici:
Attacks on IoT: Side-Channel Power Acquisition Framework for Intrusion Detection. Future Internet 15(5): 187 (2023) - 2021
- [c20]Duc-Minh Ngo, Andriy Temko, Colin C. Murphy, Emanuel M. Popovici:
FPGA Hardware Acceleration Framework for Anomaly-based Intrusion Detection System in IoT. FPL 2021: 69-75 - 2014
- [j17]Robert P. McEvoy, Michael Tunstall, Claire Whelan, Colin C. Murphy, William P. Marnane:
All-or-Nothing Transforms as a countermeasure to differential side-channel analysis. Int. J. Inf. Sec. 13(3): 291-304 (2014) - 2013
- [j14]James T. Curran, Gérard Lachapelle, Colin C. Murphy:
Errata: Digital GNSS PLL Design Conditioned on Thermal and Oscillator Phase Noise. IEEE Trans. Aerosp. Electron. Syst. 49(1): 687 (2013) - 2012
- [j13]James T. Curran, Gérard Lachapelle, Colin C. Murphy:
Digital GNSS PLL Design Conditioned on Thermal and Oscillator Phase Noise. IEEE Trans. Aerosp. Electron. Syst. 48(1): 180-196 (2012) - [j12]James T. Curran, Gérard Lachapelle, Colin C. Murphy:
Improving the Design of Frequency Lock Loops for GNSS Receivers. IEEE Trans. Aerosp. Electron. Syst. 48(1): 850-868 (2012) - [j11]Niamh O'Mahony, Colin C. Murphy:
Constrained Optimization of Coincidence Detector Parameters for GPS Acquisition. IEEE Trans. Commun. 60(1): 176-188 (2012) - [j9]James T. Curran, Gérard Lachapelle, Colin C. Murphy:
An SNR Dependent Model for the CDMA FLL. IEEE Trans. Signal Process. 60(3): 1522-1527 (2012) - 2011
- [j8]Niamh O'Mahony, Colin C. Murphy, Gérard Lachapelle:
A dual-threshold up-down counter for GPS acquisition. Signal Process. 91(5): 1093-1102 (2011) - 2010
- [j7]James T. Curran, Daniele Borio, Gérard Lachapelle, Colin C. Murphy:
Reducing front-end bandwidth may improve digital GNSS receiver performance. IEEE Trans. Signal Process. 58(4): 2399-2404 (2010) - 2009
- [j6]Cillian O'Driscoll, Colin C. Murphy:
A simplified expression for the probability of error for binary multichannel communications. IEEE Trans. Commun. 57(1): 32-35 (2009) - [j5]Robert P. McEvoy, Colin C. Murphy, William P. Marnane, Michael Tunstall:
Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 2(1): 3:1-3:23 (2009) - [c12]Niamh O'Mahony, Cillian O'Driscoll, Colin C. Murphy:
Performance of Sequential Probability Ratio Test for GPS Acquisition. ICC 2009: 1-6 - [p1]Maurice Keller, Robert Ronan, Andrew Byrne, Colin C. Murphy, William P. Marnane:
Hardware Implementation of Pairings. Identity-Based Cryptography 2009: 207-225 - [i3]Robert P. McEvoy, Michael Tunstall, Claire Whelan, Colin C. Murphy, William P. Marnane:
All-or-Nothing Transforms as a Countermeasure to Differential Side-Channel Analysis. IACR Cryptol. ePrint Arch. 2009: 185 (2009) - 2007
- [j4]Maurice Keller, Robert Ronan, William P. Marnane, Colin C. Murphy:
Hardware architectures for the Tate pairing over GF(2m). Comput. Electr. Eng. 33(5-6): 392-406 (2007) - [j3]Robert Ronan, Colin C. Murphy, Tim Kerins, Colm O'hEigeartaigh, Paulo S. L. M. Barreto:
A flexible processor for the characteristic 3 ηT pairing. Int. J. High Perform. Syst. Archit. 1(2): 79-88 (2007) - [j2]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Michael Scott, Tim Kerins:
Hardware acceleration of the Tate pairing on a genus 2 hyperelliptic curve. J. Syst. Archit. 53(2-3): 85-98 (2007) - [c11]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Tim Kerins, Paulo S. L. M. Barreto:
A Reconfigurable Processor for the Cryptographic nT Pairing in Characteristic 3. ITNG 2007: 11-16 - [c10]Robert P. McEvoy, Michael Tunstall, Colin C. Murphy, William P. Marnane:
Differential Power Analysis of HMAC Based on SHA-2, and Countermeasures. WISA 2007: 317-332 - 2006
- [c9]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Michael Scott, Tim Kerins:
FPGA acceleration of the tate pairing in characteristic 2. FPT 2006: 213-220 - [c8]Robert P. McEvoy, Colin C. Murphy:
Efficient All-or-Nothing Encryption Using CTR Mode. ICETE (Selected Papers) 2006: 92-106 - [c7]Robert P. McEvoy, Francis M. Crowe, Colin C. Murphy, William P. Marnane:
Optimisation of the SHA-2 Family of Hash Functions on FPGAs. ISVLSI 2006: 317-322 - [c6]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Michael Scott, Tim Kerins, William P. Marnane:
An Embedded Processor for a Pairing-Based Cryptosystem. ITNG 2006: 192-197 - [c5]Maurice Keller, Robert Ronan, William P. Marnane, Colin C. Murphy:
A GF(24m) Inverter and its Application in a Reconfigurable Tate Pairing Processor. ReConFig 2006: 158-167 - [c4]Robert P. McEvoy, Colin C. Murphy:
Efficient All-or-Nothing Encryption Using CTR Mode. SECRYPT 2006: 237-245 - [i2]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Tim Kerins, Paulo S. L. M. Barreto:
Hardware Implementation of the ηT Pairing in Characteristic 3. IACR Cryptol. ePrint Arch. 2006: 371 (2006) - 2005
- [i1]Robert Ronan, Colm O'hEigeartaigh, Colin C. Murphy, Michael Scott, Tim Kerins, William P. Marnane:
A Dedicated Processor for the eta Pairing. IACR Cryptol. ePrint Arch. 2005: 330 (2005) - 1999
- [c2]Emanuel M. Popovici, Patrick Fitzpatrick, Colin C. Murphy:
FPGA Design Trade-Offs for Solving the Key Equation in Reed-Solomon Decoding. FPL 1999: 353-358 - 1992
- [c1]Patrick Fitzpatrick, Colin C. Murphy:
Fault tolerant matrix triangularization and solution of linear systems of equations. ASAP 1992: 469-480
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