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2020 – today
- 2024
[j18]Binh Kieu-Do-Nguyen
, Nguyen The Binh, Cuong Pham-Quoc, Huynh Phuc Nghi, Ngoc-Thinh Tran, Trong-Thuc Hoang, Cong-Kha Pham:
Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme. Inf. 15(7): 400 (2024)- [c25]Cuong Pham-Quoc, Pham Le Song Ngan:
A High-Throughput FPGA-Based Elliptic Curve Digital Signature Core for IoT Edge Platforms. ICCSA (Workshops 6) 2024: 31-43 - 2023
- [j17]Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang:
Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor. IEEE Access 11: 4879-4894 (2023) - [j16]Tran Ngoc Thinh, Tran Hoang Quoc Bao, Duc-Minh Ngo, Cuong Pham-Quoc:
High-performance anomaly intrusion detection system with ensemble neural networks on reconfigurable hardware. Concurr. Comput. Pract. Exp. 35(15) (2023) - [j15]Duc-Minh Ngo, Dominic Lightbody, Andriy Temko, Cuong Pham-Quoc, Ngoc-Thinh Tran, Colin C. Murphy, Emanuel M. Popovici:
HH-NIDS: Heterogeneous Hardware-Based Network Intrusion Detection Framework for IoT Security. Future Internet 15(1): 9 (2023) - [j14]Phan Hien Vu, Danh Phan Hong Pham, Tran Vu Pham, Kashif Naseer Qureshi, Cuong Pham-Quoc:
An IoT System and MODIS Images Enable Smart Environmental Management for Mekong Delta. Future Internet 15(7): 245 (2023) - [j13]Vu Tuan Anh, Phan Cong Vinh, Cuong Pham-Quoc:
Contextual Perception in Internet of Mobile Things: A categorical structure. Internet Things 22: 100799 (2023) - [j12]Trung Dinh Pham, Cuong Pham-Quoc, Tran Ngoc Thinh, Binh Kieu-Do-Nguyen, Cong-Kha Pham:
A flexible and efficient FPGA-based random forest architecture for IoT applications. Internet Things 22: 100813 (2023) - [j11]Cuong Pham-Quoc, Vien Nguyen-Duy-Nhat, Mai T. P. Le, Hung Nguyen-Le, Chien Tang-Tan, Tuan Tang-Anh, Nghia Nguyen-Xuan:
Robust 3D Beamforming for Secure UAV Communications by DAE. Mob. Networks Appl. 28(3): 1197-1205 (2023) - [c24]Cuong Pham-Quoc:
Scalable and Efficient Architecture for Random Forest on FPGA-Based Edge Computing. Euro-Par Workshops (1) 2023: 42-54 - [c23]Cuong Pham-Quoc:
FPGA-Based Hardware/Software Codesign for Video Encoder on IoT Edge Platforms. ICCSA (Workshops 5) 2023: 82-96 - [c22]Cuong Pham-Quoc, Tran Ngoc Thinh:
FPGA-Enabled Efficient Framework for High-Performance Intrusion Prevention Systems. ICCSA (Workshops 6) 2023: 83-98 - [c21]Nguyen The Binh, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham, Cuong Pham-Quoc:
FPGA-Based Secured and Efficient Lightweight IoT Edge Devices with Customized RISC-V. RIVF 2023: 31-36 - 2022
- [j10]Tuan Anh Vu, Cuong Pham-Quoc:
Building a smart traffic light system based on Internet of Things using -calculus. Concurr. Comput. Pract. Exp. 34(10) (2022) - [j9]Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang:
Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA. Cryptogr. 6(2): 25 (2022) - [j8]Cuong Pham-Quoc, Xuan Quang Nguyen, Tran Ngoc Thinh:
Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing. Mob. Networks Appl. 27(5): 2024-2035 (2022) - [i1]Trung Dinh Pham, Bao Gia Bach, Lam Trinh Luu, Minh Dinh Nguyen, Hai Duc Pham, Khoa Bui Anh, Xuan Quang Nguyen, Cuong Pham-Quoc:
An FPGA-based Solution for Convolution Operation Acceleration. CoRR abs/2206.04520 (2022) - 2021
- [j7]Cuong Pham-Quoc, Tran Ngoc Thinh, Trong Nhan Le, Phan Hien Vu, Tan Long Le, Kha-Tu Huynh:
Air Quality Monitoring Systems with Multiple Data Sources for Ho Chi Minh City. EAI Endorsed Trans. Context aware Syst. Appl. 7(23): e4 (2021) - [j6]Cuong Pham-Quoc, Binh Kieu-Do, Tran Ngoc Thinh:
A high-performance FPGA-based BWA-MEM DNA sequence alignment. Concurr. Comput. Pract. Exp. 33(2) (2021) - [c20]Tuan Anh Vu, Cong-Vinh Phan, Cuong Pham-Quoc:
Internet of Things Big Data Management and Analytic for Developing Smart City: A Survey and Future Studies. ICCASA 2021: 48-55 - [c19]Cuong Pham-Quoc, Xuan Quang Nguyen, Tran Ngoc Thinh:
Hardware/Software Co-design for Convolutional Neural Networks Acceleration: A Survey and Open Issues. ICCASA 2021: 164-178 - 2020
- [j5]Cuong Pham-Quoc:
Automatic FPGA-based Hardware Accelerator Design: A Case Study with Image Processing Applications. EAI Endorsed Trans. Context aware Syst. Appl. 7(20): e5 (2020) - [j4]Duc-Minh Ngo, Cuong Pham-Quoc, Tran Ngoc Thinh:
Heterogeneous Hardware-based Network Intrusion Detection System with Multiple Approaches for SDN. Mob. Networks Appl. 25(3): 1178-1192 (2020) - [c18]Phan Hien Vu, Tan Long Le, Cuong Pham-Quoc:
Estimating Land Surface Temperature from Landsat-8 Images Based on a Cloud-Based Automated Processing Service. ICCASA/ICTCC 2020: 55-64 - [c17]Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Cong-Kha Pham:
Hardware-assisted High-performance DNA Alignment System. ICIIT 2020: 45-50 - [c16]Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Cong-Kha Pham:
Heterogeneous Hardware-assisted Parallel Processing for BWA-MEM DNA Alignment. RIVF 2020: 1-7
2010 – 2019
- 2019
- [j3]Vu Tuan Anh, Cuong Pham-Quoc, Phan Cong Vinh:
Context-Aware Mobility in Internet of Thing: A Survey. EAI Endorsed Trans. Context aware Syst. Appl. 6(16): e3 (2019) - [c15]Vu Tuan Anh, Cuong Pham-Quoc, Phan Cong Vinh:
Context-Aware Mobility Based on \pi -Calculus in Internet of Thing: A Survey. ICCASA/ICTCC 2019: 38-46 - [c14]Duc-Minh Ngo, Binh Tran-Thanh, Truong Dang, Tuan Tran, Tran Ngoc Thinh, Cuong Pham-Quoc:
High-Throughput Machine Learning Approaches for Network Attacks Detection on FPGA. ICCASA/ICTCC 2019: 47-60 - [c13]Phuc-Anh Nguyen, Tan-Ri Le, Phuc-Loc Nguyen, Cuong Pham-Quoc:
IoT-Based Air-Pollution Hazard Maps Systems for Ho Chi Minh City. ICCASA/ICTCC 2019: 61-73 - 2018
- [j2]Duc-Minh Ngo, Cuong Pham-Quoc, Tran Ngoc Thinh:
An Efficient High-Throughput and Low-Latency SYN Flood Defender for High-Speed Networks. Secur. Commun. Networks 2018: 9562801:1-9562801:14 (2018) - [c12]Cuong Pham-Quoc, Binh Kieu-Do, Tran Ngoc Thinh:
An FPGA-Based Seed Extension IP Core for BWA-MEM DNA Alignment. ACOMP 2018: 1-6 - [e1]Lam-Son Lê, Tran Khanh Dang, Koichiro Ishibashi, Tran Ngoc Thinh, Cuong Pham-Quoc, Quang Tran Minh:
2018 International Conference on Advanced Computing and Applications, ACOMP 2018, Ho Chi Minh City, Vietnam, November 27-29, 2018. IEEE Computer Society 2018, ISBN 978-1-5386-9186-1 [contents] - 2017
- [c11]Cuong Pham-Quoc, Binh Kieu-Do-Nguyen, Anh-Vu Dinh-Duc:
BKVex: An Adaptable VLIW Processor and Design Framework for Reconfigurable Computing Platforms. ACOMP 2017: 39-46 - [c10]Cuong Pham-Quoc, Binh Tran-Thanh, Tran Ngoc Thinh:
A Scalable FPGA-based Floating-Point Gaussian Filtering Architecture. ACOMP 2017: 111-116 - 2016
- [j1]Cuong Pham-Quoc, Biet Nguyen, Tran Ngoc Thinh:
FPGA-based Multicore Architecture for Integrating Multiple DDoS Defense Mechanisms. SIGARCH Comput. Archit. News 44(4): 14-19 (2016) - [c9]Bao Ho, Cuong Pham-Quoc, Tran Ngoc Thinh, Nam Thoai:
A Secured OpenFlow-Based Switch Architecture. ACOMP 2016: 83-89 - 2015
- [c8]Cuong Pham-Quoc, Imran Ashraf, Zaid Al-Ars, Koen Bertels:
Heterogeneous Hardware Accelerators with Hybrid Interconnect: An Automated Design Approach. ACOMP 2015: 59-66 - 2014
- [c7]Razvan Nane, Vlad Mihai Sima, Cuong Pham-Quoc, Fernando M. Gonçalves, Koen Bertels:
High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain. EUC 2014: 138-145 - [c6]Cuong Pham-Quoc, Zaid Al-Ars, Koen Bertels:
Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling. IPDPS Workshops 2014: 151-160 - 2013
- [c5]Cuong Pham-Quoc, Zaid Al-Ars, Koen Bertels:
Heterogeneous hardware accelerators interconnect: An overview. AHS 2013: 189-197 - [c4]Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jürgen Becker, Koen Bertels:
Hybrid interconnect design for heterogeneous hardware accelerators. DATE 2013: 843-846 - 2012
- [c3]Cuong Pham-Quoc, Zaid Al-Ars, Koen Bertels:
Rule-based data communication optimization using quantitative communication profiling. FPT 2012: 104-108 - [c2]Cuong Pham-Quoc, Zaid Al-Ars, Koen Bertels:
A heuristic-based communication-aware hardware optimization approach in heterogeneous multicore systems. ReConFig 2012: 1-6 - 2010
- [c1]Cuong Pham-Quoc, Anh-Vu Dinh-Duc:
Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA. DELTA 2010: 289-292
Coauthor Index
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last updated on 2024-08-23 19:26 CEST by the dblp team
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