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Mahesh A. Iyer
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Publications
- 2023
- [c24]Rachel Selina Rajarathnam, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan:
DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs. ISPD 2023: 175-184 - 2022
- [c23]Rachel Selina Rajarathnam, Mohamed Baker Alawieh, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan:
DREAMPlaceFPGA: An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit. ASP-DAC 2022: 300-306 - 2020
- [c22]Mohamed Baker Alawieh, Wuxi Li, Yibo Lin, Love Singhal, Mahesh A. Iyer, David Z. Pan:
High-Definition Routing Congestion Prediction for Large-Scale FPGAs. ASP-DAC 2020: 26-31 - 2019
- [c19]Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan:
A shape-driven spreading algorithm using linear programming for global placement. ASP-DAC 2019: 563-568 - [c18]Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan:
FPGA Accelerated FPGA Placement. FPL 2019: 404-410 - [c17]Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan:
FPGA-Accelerated Spreading for Global Placement. HPEC 2019: 1-7 - 2017
- [c16]Love Singhal, Mahesh A. Iyer, Saurabh N. Adya:
LSC: A Large-Scale Consensus-Based Clustering Algorithm for High-Performance FPGAs. DAC 2017: 30:1-30:6 - [c14]Shounak Dhar, Mahesh A. Iyer, Saurabh N. Adya, Love Singhal, Nikolay Rubanov, David Z. Pan:
An Effective Timing-Driven Detailed Placement Algorithm for FPGAs. ISPD 2017: 151-157 - 2016
- [c13]Shounak Dhar, Saurabh N. Adya, Love Singhal, Mahesh A. Iyer, David Z. Pan:
Detailed placement for modern FPGAs using 2D dynamic programming. ICCAD 2016: 9 - 1999
- [c9]Leon Stok, Andrew J. Sullivan, Mahesh A. Iyer:
Wavefront Technology Mapping. DATE 1999: 531-
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