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2010 – 2019
- 2012
[j4]Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu:
Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. Int. J. Reconfigurable Comput. 2012: 360242:1-360242:9 (2012)- 2011
- [c10]Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger:
Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE 2011: 1004-1009 - 2010
- [j3]Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu:
Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. Int. J. Reconfigurable Comput. 2010: 375245:1-375245:12 (2010) - [j2]Sylvain Guilley, Laurent Sauvage
, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet:
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59(9): 1250-1263 (2010) - [c9]Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger:
Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS 2010: 6 - [c8]Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette:
Characterization of the Electromagnetic Side Channel in Frequency Domain. Inscrypt 2010: 471-486 - [c7]Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament:
Entropy-based Power Attack. HOST 2010: 1-6 - [c6]Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament:
First Principal Components Analysis: A New Side Channel Distinguisher. ICISC 2010: 407-419 - [c5]Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu:
Cross-Correlation Cartography. ReConFig 2010: 268-273 - [c4]Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne:
Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig 2010: 310-315
2000 – 2009
- 2009
- [c3]Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane:
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig 2009: 213-218 - [c2]Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu:
DPL on Stratix II FPGA: What to Expect?. ReConFig 2009: 243-248 - 2008
- [c1]Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger:
An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC 2008: 120-125 - 2007
- [j1]Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu:
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Des. Test Comput. 24(6): 546-555 (2007)
Coauthor Index
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