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ORCIDSIGARCH Computer Architecture News, Volume 40
Volume 40, Number 1, March 2012
- Tim Harris, Michael L. Scott:
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2012, London, UK, March 3-7, 2012. ACM 2012, ISBN 978-1-4503-0759-8 [contents]
Volume 40, Number 2, May 2012
- Ben H. H. Juurlink, Cor Meenderinck:
Amdahl's law for predicting the future of multicores considered harmful. 1-9 - Conrad Mueller:
Axiom based architecture. 10-17 - Alexander Thomasian:
Rebuild processing in RAID5 with emphasis on the supplementary parity augmentation method[37]. 18-27 - Nishant Kumar Giri, Amitabha Sinha:
FPGA implementation of a novel architecture for performance enhancement of Radix-2 FFT. 28-32 - Aniruddha Ghosh
, Satrughna Singha, Amitabha Sinha:
A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system. 33-38 - Aniruddha Ghosh, Satrughna Singha, Amitabha Sinha:
"Floating point RNS": a new concept for designing the MAC unit of digital signal processor. 39-43
- Mark Thorson:
Internet nuggets. 44-49
Volume 40, Number 3, June 2012
- 39th International Symposium on Computer Architecture (ISCA 2012), June 9-13, 2012, Portland, OR, USA. IEEE Computer Society 2012, ISBN 978-1-4673-0475-7 [contents]
Volume 40, Number 4, September 2012
- Marcos K. Aguilera, Dahlia Malkhi, Keith Marzullo, Alessandro Panconesi, Andrzej Pelc, Roger Wattenhofer:
Announcing the 2012 Edsger W. Dijkstra prize in distributed computing. 1-2 - Subhashis Maitra, Amitabha Sinha:
A new algorithm for computing triple-base number system. 3-9 - Shiv Kumar, Seshadri Krishna Murthy, G. Varaprasad, S. Sivasathya:
Network load and traffic pattern on the capacity of wireless ad hoc networks. 10-25 - Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton:
Efficient architecture and scheduling technique for pairwise sequence alignment. 26-31 - Abdelkrim Kamel Oudjida, Nicolas Chaillet, Mohamed Lamine Berrandjia, Ahmed Liacha:
A new high radix-2r (r≥8) multibit recoding algorithm for large operand size (N≥32) multipliers. 32-43
- Mark Thorson:
Internet nuggets. 44-48
Volume 40, Number 5, December 2012
- Kentaro Sano, Yoshiaki Kono:
FPGA-based Connect6 solver with hardware-accelerated move refinement. 4-9 - Thomas C. P. Chau, Wayne Luk, Peter Y. K. Cheung:
Roberts: reconfigurable platform for benchmarking real-time systems. 10-15 - Kei Kinoshita, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao, Yoshiki Yamaguchi:
An augmented reality system with a coarse-grained reconfigurable device. 16-21 - Nicholas Ng, Nobuko Yoshida, Xinyu Niu, Kuen Hung Tsoi:
Session types: towards safe and fast reconfigurable programming. 22-27 - Rizwan Syed, Yajun Ha, Bharadwaj Veeravalli:
A low overhead abstract architecture for FPGA resource management. 28-33 - Kuen Hung Tsoi, Tobias Becker, Wayne Luk:
Modelling reconfigurable systems in event driven simulation. 34-39 - Zheng Zhi Shun, Tsutomu Maruyama:
FPGA acceleration of CDO pricing based on correlation expansions. 40-45 - Hiroki Nakahara, Hiroyuki Nakanishi, Tsutomu Sasao:
On a wideband fast fourier transform for a radio telescope. 46-51 - Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada:
High performance phylogenetic analysis on CUDA-compatible GPUs. 52-57 - Colin Yu Lin, Hayden Kwok-Hay So:
Energy-efficient dataflow computations on FPGAs using application-specific coarse-grain architecture synthesis. 58-63 - Jamshaid Sarwar Malik, Paolo Palazzari, Ahmed Hemani:
Effort, resources, and abstraction vs performance in high-level synthesis: finding new answers to an old question. 64-69 - Takeshi Kakimoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm. 70-75 - Julien Tribino, Antoine Trouvé, Hadrien A. Clarke, Kazuaki J. Murakami:
PASTIS: a photonic arbitration with scalable token injection scheme. 76-81 - Takahiro Watanabe, Minoru Watanabe:
0.18 μm CMOS proess high-sensitivity optially reonfgurable gatearray VLSI. 82-86 - Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi:
A non-volatile reconfigurable offloader for wireless sensor nodes. 87-92
- Mark Thorson:
Internet nuggets. 93-112
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