DSD 2005: Porto, Portugal

Cover

Introduction

Keynote Speeches

SS2: Dependability and Testing of Digital Systems, Part 1. (S1)

System Synthesis, Part 1. Power and Component Driven System Synthesis (S2)

Circuits Synthesis, Part 1. Arithmetic (S3)

SS2: Dependability and Testing of Digital Systems, Part 2. (S4)

System Synthesis, Part 2. Component Based System Synthesis (S5)

Circuits Synthesis, Part 2. Logic Synthesis (S6)

SS1: Wireless Sensor Systems, Part 1. (S7)

Verification Techniques, Part 1. (S8)

Application Specific Architectures, Part 1. (S9)

SS1: Wireless Sensor Systems, Part 2. (S10)

Verification Techniques, Part 2. (S11)

Application Specific Architectures, Part 2. (S12)

System Synthesis, Part 3. High Level Language based System Synthesis (S13)

Reconfigurable Systems, Part 1. (S14)

Data Management in SoC, Part 1. (S15)

SS3: Remonte Educational Tools for Design and Testing, Part 1 (S16)

Circuits Synthesis, Part 3. Advanced Logic Synthesis (S17)

Performance Optimization: Architecture and Tools, Part 1. (S18)

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