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Publication search results
found 466 matches
- 2024
- Heyi Li, Kaixuan Du, Yuanxin Bao, Yanchi Dong, Jiayoon Ru, Han Xiao, Hao Zhang, Zhixuan Wang, Yi Zhong, Linxiao Shen, Le Ye, Ru Huang:
A 0.39-mm2 Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC. IEEE J. Solid State Circuits 59(2): 435-448 (2024) - 2023
- Mahdi Hosseinnejad, Mostafa Katebi, Abbas Erfanian, Mohammad Azim Karami:
A 2-mA charge-balanced neurostimulator in 0.18-μm/1.8 V standard CMOS process. Int. J. Circuit Theory Appl. 51(3): 1092-1109 (2023) - Sanming Hu, Zihao Shi, Guoqing Dong, Yizhu Shen:
D-Band On-Chip Couplers With Multilayered Slow-Wave Unit Cell in Standard CMOS Process. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3781-3789 (2023) - Dana Kim, Jong-Phil Hong, Jiwon Lee, Jae-Won Nam:
High-Speed Light Detection Sensor for Hardware Security in Standard CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3917-3921 (2023) - Takaya Sugiura, Hiroki Miura, Nobuhiko Nakano:
High-Temperature Operational Piezoresistive Pressure Sensor on Standard CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 726-730 (2023) - Yi Ding, Xinyue Gu, Xinqin Guo, Hongming Lyu:
A Wireless Bimodal 16-Channel 12-V-Compliant Current-Controlled Neural Stimulation IC in a Standard CMOS Technology. BioCAS 2023: 1-5 - Xin Yue, Eric R. Fossum:
Simulation and design of a burst mode 20Mfps global shutter high conversion gain CMOS image sensor in a standard 180nm CMOS image sensor process using sequential transfer gates. Imaging Sensors and Systems 2023: 1-5 - Victor M. van Santen, Jose M. Gata-Romero, Juan Núñez, Rafael Castro-López, Elisenda Roca, Hussam Amrouch:
Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths. IRPS 2023: 1-6 - Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham:
In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology. ISCAS 2023: 1-5 - Shubham Yadav, André B. J. Kokkeler, Mark S. Oude Alink:
Improved Toolchain-Compatible Standard Cells with 5% - 36% Lower EDP for Super Threshold Operation in 65nm Low-Power CMOS Technology. ISCAS 2023: 1-5 - Kim-Hoang Nguyen, Woojin Ahn, Minkyu Je, Quyet Nguyen, Quynh-Trang Nguyen, Thanh-Tung Vu, Loan Pham-Nguyen:
A Neural Stimulator IC with Dynamic Voltage Scaling Supply and Energy Recycling for Cochlear Implant in Standard 180nm CMOS Process. ISOCC 2023: 35-36 - Francisco Barreira, Iria García-López, Thiago Darós, Graça Minas, João Piteira:
9.9 V High-Voltage Switch in a standard 180 nm CMOS technology for MEMS Inclinometers. PRIME 2023: 301-304 - 2022
- Marko S. Andjelkovic:
A methodology for characterization, modeling and mitigation of single event transient effects in CMOS standard combinational cells (Eine Methode zur Charakterisierung, Modellierung und Minderung von SET Effekten in kombinierten CMOS-Standardzellen). University of Potsdam, Germany, 2022 - Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Cong-Kha Pham:
A Unified NVRAM and TRNG in Standard CMOS Technology. IEEE Access 10: 79213-79221 (2022) - Muhammad Ovais Akhter, Najam Muhammad Amin, Razia Zia:
Design and optimisation of high-efficient class-F ULP-PA using envelope tracking supply bias control for long-range low power wireless local area network IEEE 802.11ah standard using 65 nm CMOS technology. IET Circuits Devices Syst. 16(7): 553-568 (2022) - David Palomeque-Mangut, Ángel Rodríguez-Vázquez, Manuel Delgado-Restituto:
A Fully Integrated, Power-Efficient, 0.07-2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process. Sensors 22(17): 6429 (2022) - Yun-Sheng Chan, Ting-Ting Hsu, Yi-Po Chen, Hsu-Min Wu, Yun-Ming Wang, Chen-Yi Lee:
A Traveling-Wave Dielectrophoresis Bio-Chip for Cell Manipulation in Standard CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1582-1586 (2022) - Hsu-Chi Lee, Yun-Chih Lu, Yu-Chen Lin, Wei-Lin Lai, Hsiang-Yuan Hsieh, Boy-Yiing Jaw, Chin-Tang Chuang, Yung-Chih Chen, Yi-Jan Emery Chen:
A High Voltage Driving Chiplet in Standard 0.18-μm CMOS for Micro-Pixelated LED Displays Integrated With LTPS TFTs. IEEE Trans. Circuits Syst. Video Technol. 32(10): 7204-7211 (2022) - David Palomeque-Mangut, Ángel Rodríguez-Vázquez, Manuel Delgado-Restituto:
Experimental Validation of a High-Voltage Compliant Neural Stimulator implemented in a Standard 1.8V/3.3V CMOS Process. BioCAS 2022: 335-339 - Francesco Gagliardi, Mattia Cicalini, Andrea Ria, Massimo Piotto, Paolo Bruschi:
An Analog Driver compliant with Supply Voltages exceeding the Ratings of Standard CMOS Processes. ICECS 2022 2022: 1-4 - Houman Zahedmanesh, Ivan Ciofi, Odysseas Zografos, Kristof Croes, Mustafa Badaroglu:
System-Level Simulation of Electromigration in a 3 nm CMOS Power Delivery Network: The Effect of Grid Redundancy, Metallization Stack and Standard-Cell Currents. IRPS 2022: 1-7 - Weijie Han, Ziyang Luo, Chen Chen, Jin Liu, Hoi Lee:
A 200mA-Load 0.62fs-FOM Active-Capacitor-Assisted Dual-loop Output Capacitorless Low-Dropout Regulator in Standard 65nm CMOS. ISCAS 2022: 1906-1909 - David Palomeque-Mangut, Ángel Rodríguez-Vázquez, Manuel Delgado-Restituto:
A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS Process. LASCAS 2022: 1-4 - Roman Fragasse, Ramy Tantawy, Dale Shane Smith, Suat Ay, Waleed Khalil:
An Open-Circuit Voltage Pixel for Low-Light Visible Imaging in a Standard CMOS Process. PRIME 2022: 289-292 - 2021
- Marwa Mansour, Abdelhalim Zekry, Mohammed K. Ali, Heba A. Shawkey:
Integrated multi-band RF transceiver design for multi-standard applications using 130 nm CMOS technology. Microelectron. J. 110: 105006 (2021) - Chi-Han Wu, Po-Jen Shih, Yao-Chuan Tsai, Ching-Liang Dai:
Manufacturing and Characterization of Three-Axis Magnetic Sensors Using the Standard 180 nm CMOS Technology. Sensors 21(21): 6953 (2021) - Xuetao Zeng, Xuan Zhang, Lei Yao, Ning Xue:
A 15.4V Fully-Integrated Energy-Efficient Pulse Generator in Standard 0.18 μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1812-1816 (2021) - Ming Li, Xiaoxu Kang, Xiaolan Zhong:
A Novel Etch Scheme to Form Sloped Profile by Standard Anisotropic CMOS Process. ASICON 2021: 1-4 - Takaki Urabe, Hiroyuki Ochi, Kazutoshi Kobayashi:
Nonvolatile SRAM Using Fishbone-in-Cage Capacitor in a 180 nm Standard CMOS Process for Zero-Standby and Instant-Powerup Embedded Memory on IoT. COOL CHIPS 2021: 1-3 - Anupam Yadav:
Power Optimization of 8-bit Register on Ultra Scale FPGA using Low Voltage CMOS I/O Standard. ICCCNT 2021: 1-6
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