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Aamer Jaleel
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Publications
- 2007
- [c9]Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob:
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA 2007: 109-120 - 2006
- [j2]Aamer Jaleel, Bruce L. Jacob:
In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). IEEE Trans. Computers 55(5): 559-574 (2006) - [c5]Aamer Jaleel, Matthew Mattina, Bruce L. Jacob:
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA 2006: 88-98 - 2005
- [j1]David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob:
DRAMsim: a memory system simulator. SIGARCH Comput. Archit. News 33(4): 100-107 (2005) - [c4]Aamer Jaleel, Bruce L. Jacob:
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. HPCA 2005: 191-200 - [c3]Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung:
BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS 2005: 2-9 - 2001
- [c2]Aamer Jaleel, Bruce L. Jacob:
Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. HiPC 2001: 282-293 - [c1]Aamer Jaleel, Bruce L. Jacob:
In-Line Interrupt Handling for Software-Managed TLBs. ICCD 2001: 62-67
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