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ORCIDJef L. van Meerbergen
- > Home > Persons > Jef L. van Meerbergen
Publications
- 1998
[j10]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf:
The Complexity of Multidimensional Periodic Scheduling. Discret. Appl. Math. 89(1-3): 213-242 (1998)- 1997
- [c21]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen:
Multidimensional periodic scheduling: a solution approach. ED&TC 1997: 468-474 - 1996
- [c17]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf:
Multidimensional Periodic Scheduling Model and Complexity. Euro-Par, Vol. II 1996: 226-235 - 1995
- [j9]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Jef L. van Meerbergen, Albert van der Werf:
Improved force-directed scheduling in high-throughput digital signal processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(8): 945-960 (1995) - [j8]Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh, Albert van der Werf:
PHIDEO: High-level synthesis for high throughput applications. J. VLSI Signal Process. 9(1-2): 89-104 (1995) - 1994
- [c13]Douglas M. Grant, Jef L. van Meerbergen, Paul E. R. Lippens:
Optimization of Address Generator Hardware. EDAC-ETC-EUROASIC 1994: 325-329 - [c12]Albert van der Werf, Jef L. van Meerbergen, Emile H. L. Aarts, Wim F. J. Verhaegh, Paul E. R. Lippens:
Efficient timing constraint derivation for optimal retiming high speed processing units. HLSS 1994: 48-53 - 1993
- [j7]Jef L. van Meerbergen, Paul E. R. Lippens, B. T. McSweeney, Wim F. J. Verhaegh, Albert van der Werf, A. van Zanten:
Architectural strategies for high-throughput applications. J. VLSI Signal Process. 5(2-3): 201-220 (1993) - [c11]Paul E. R. Lippens, Jef L. van Meerbergen, Wim F. J. Verhaegh, Albert van der Werf:
Allocation of multiport memories for hierarchical data stream. ICCAD 1993: 728-735 - [c10]Albert van der Werf, Emile H. L. Aarts, E. W. Heijnen, Jef L. van Meerbergen, Wim F. J. Verhaegh, Paul E. R. Lippens:
A new method for retiming multi-functional processing units. VLSI 1993: 191-200 - 1992
- [c9]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Albert van der Werf, Jef L. van Meerbergen:
Efficiency improvements for force-directed scheduling. ICCAD 1992: 286-291 - [c8]Albert van der Werf, M. J. H. Peek, Emile H. L. Aarts, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh:
Area optimization of multi-functional processing units. ICCAD 1992: 292-299 - 1991
- [c7]Paul E. R. Lippens, Jef L. van Meerbergen, Albert van der Werf, Wim F. J. Verhaegh, B. T. McSweeney, Jos Huisken, O. McArdle:
PHIDEO: a silicon compiler for high speed algorithms. EURO-DAC 1991: 436-441 - [c6]Albert van der Werf, B. T. McSweeney, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh:
Hierarchical Retiming Including Pipelining. VLSI 1991: 451-460 - 1990
- [j3]Jef L. van Meerbergen, Jos Huisken
, Paul E. R. Lippens, O. McArdle, R. Segers, Gert Goossens, Jan Vanhoof, Dirk Lanneer, Francky Catthoor, Hugo De Man:
An integrated automatic design system for complex DSP algorithms. J. VLSI Signal Process. 1(4): 265-278 (1990)
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