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ORCIDMinsu Choi
- > Home > Persons > Minsu Choi
Publications
- 2023
[c56]Yixuan He, Minsu Choi, Kyung-Ki Kim, Yong-Bin Kim:
Low-Power Counters using Pathfinding Technique. ISOCC 2023: 69-70- [c55]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Modeling Truncation-Based Approximation Error in Stochastic Computing Circuits. ISOCC 2023: 291-292 - 2022
- [c52]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Time-Efficient Approximate Stochastic Computing for Medical Imaging Applications. ISOCC 2022: 314-315 - [c51]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
A Time-Domain Parallel Counter for Deep Learning Macro. ISOCC 2022: 346-347 - 2021
- [c50]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
A Time-Domain Computing-In-Memory Micro using Ring Oscillator. ISOCC 2021: 107-108 - [c49]Youngwook Lee, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Stochastic Edge Detection for Fine-Grained Progressive Precision. ISOCC 2021: 119-120 - [c48]Cheolhyeong Park, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
FPGA-based Scalable Road Image Stochastic Denosing Approach. ISOCC 2021: 351-352 - 2020
- [c47]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor. ISOCC 2020: 131-132 - [c46]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. ISOCC 2020: 282-283 - [c45]Yixuan He, Minsu Choi, Yong-Bin Kim:
A Tunable High-Gain Low-Noise Transimpedance Amplifier for Biosensing. MWSCAS 2020: 1007-1010 - 2019
- [c44]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Optimization of Null Convenction Logic Using Gate Diffusion Input. ISOCC 2019: 21-22 - [c43]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Area Efficient Multi-Threshold Null Convenction Logic. ISOCC 2019: 27-28 - 2018
- [c41]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Generalized Adaptive Variable Bit Truncation Method for Approximate Stochastic Computing. ISOCC 2018: 218-219 - [c40]Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique. ISOCC 2018: 233-234 - 2017
- [c36]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Low-power null convention logic design based on modified gate diffusion input technique. ISOCC 2017: 21-22 - [c35]Ramu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Variable bit truncation technique for approximate stochastic computing (ASC). ISOCC 2017: 73-74 - 2016
- [c34]Ramu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Approximate stochastic computing (ASC) for image processing applications. ISOCC 2016: 31-32 - [c33]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Hybrid GDI-NCL for area/power reduction. ISOCC 2016: 93-94 - [c32]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Parallel decoding for multi-stage BCH decoder. ISOCC 2016: 107-108 - 2014
- [j25]Siva Kotipalli
, Yong-Bin Kim, Minsu Choi:
Asynchronous Advanced Encryption Standard Hardware with Random Noise Injection for Improved Side-Channel Attack Resistance. J. Electr. Comput. Eng. 2014: 837572:1-837572:13 (2014) - 2012
- [c25]Jun Wu, Yong-Bin Kim, Minsu Choi:
Configurable logic block (CLB) design for Asynchronous Nanowire Crossbar system. MWSCAS 2012: 170-173 - [c24]Jun Wu, Yong-Bin Kim, Minsu Choi:
Post-configuration repair strategy for asynchronous nanowire crossbar system. MWSCAS 2012: 174-177 - [c23]He Qi, Yong-Bin Kim, Minsu Choi:
A high speed low power modulo 2n+1 multiplier design using carbon-nanotube technology. MWSCAS 2012: 406-409 - [c22]Siva Pavan Kumar Kotipalli, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function. MWSCAS 2012: 410-413 - 2010
- [j20]HeungJun Jeon, Yong-Bin Kim, Minsu Choi:
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems. IEEE Trans. Instrum. Meas. 59(5): 1127-1133 (2010) - [c18]Janardhanan S. Ajit, Yong-Bin Kim, Minsu Choi:
Performance assessment of analog circuits with carbon nanotube FET (CNFET). ACM Great Lakes Symposium on VLSI 2010: 163-166 - [c17]Jun Wu, Yong-Bin Kim, Minsu Choi:
Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystems. ACM Great Lakes Symposium on VLSI 2010: 459-464 - 2007
- [j14]Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park:
Leakage Minimization Technique for Nanoscale CMOS VLSI. IEEE Des. Test Comput. 24(4): 322-330 (2007) - [c16]Ravi Bonam, Yong-Bin Kim, Minsu Choi:
Defect-Tolerant Gate Macro Mapping & Placement in Clock-Free Nanowire Crossbar Architecture. DFT 2007: 161-169 - 2006
- [c14]Yadunandana Yellambalase, Minsu Choi, Yong-Bin Kim:
Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects. DFT 2006: 98-106 - 2005
- [j10]Noh-Jin Park, K. M. George, Nohpill Park, Minsu Choi, Yong-Bin Kim, Fabrizio Lombardi:
Environmental-based characterization of SoC-based instrumentation systems for stratified testing. IEEE Trans. Instrum. Meas. 54(3): 1241-1248 (2005) - 2004
- [j8]Minsu Choi, Nohpill Park, Vincenzo Piuri, Yong-Bin Kim, Fabrizio Lombardi:
Balanced dual-stage repair for dependable embedded memory cores. J. Syst. Archit. 50(5): 281-285 (2004) - 2003
- [c8]Minsu Choi, Hardy J. Pottinger, Nohpill Park, Yong-Bin Kim:
Need For Undergraduate And Graduate-Level Education In Testing Of Microelectronic Circuits And Systems. MSE 2003: 121-122 - [c7]Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri:
Optimal Spare Utilization in Repairable and Reliable Memory Cores. MTDT 2003: 64-71 - [c6]Minsu Choi, Noh-Jin Park, K. M. George, Byoungjae Jin, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi:
Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems. NCA 2003: 341-350 - 2002
- [c5]Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri:
Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems. DFT 2002: 419-427 - [c2]Minsu Choi, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi:
Hardware/Software Co-Reliability of Configurable Digital Systems. PRDC 2002: 67-74
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