George Nikiforos

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Stamatis G. Kavadias

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Publications

2019
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George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Xiaojun Yang, Dionisios N. Pnevmatikatos, Manolis Katevenis:
Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability. Trans. High Perform. Embed. Archit. Compil. 5: 100-120 (2019)
2013
[j1]
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  - journals/jsa/KachrisNPKK13
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Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, Stamatis G. Kavadias, Manolis Katevenis:
NP-SARC: Scalable network processing in the SARC multi-core FPGA platform. J. Syst. Archit. 59(1): 39-47 (2013)
2011
[c3]
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  - conf/date/TendulkarPNKNK11
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Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis:
Fine-grain OpenMP runtime support with explicit communication hardware primitives. DATE 2011: 891-894
2010
[c2]
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  - conf/reconfig/KachrisNKPK10
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Christoforos Kachris, George Nikiforos, Stamatis G. Kavadias, Vassilis Papaefstathiou, Manolis Katevenis:
Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface. ReConFig 2010: 328-333
2009
[c1]
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  - conf/samos/KalokerinosPNKKPY09
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George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Manolis Katevenis, Dionisios N. Pnevmatikatos, Xiaojun Yang:
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability. ICSAMOS 2009: 149-156

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