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José Carlos Alves
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Publications
- 2005
- [c8]Francisco Duarte, José Machado da Silva, José Carlos Alves, G. A. Pinho, José Silva Matos:
A processor for testing mixed-signal cores in System-on-Chip. DSD 2005: 184-191 - 1999
- [c6]José Carlos Alves, João Canas Ferreira, C. Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos:
FAFNER-Accelerating Nesting Problems with FPGAs. FCCM 1999: 168- - 1998
- [c5]José Carlos Alves, José Silva Matos:
RVC - A Reconfigurable Coprocessor for Vector Processing Applications. FCCM 1998: 258-259 - [c4]João Canas Ferreira, José Carlos Alves, Célio Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos:
Flexible hardware acceleration for nesting problems. ICECS 1998: 345-348 - 1997
- [c3]José Carlos Alves, André T. Puga, Luís Corte-Real, José Silva Matos:
A vector architecture for higher-order moments estimation. ICASSP 1997: 4145-4148 - [c2]José Machado da Silva, Ana C. Leão, José Silva Matos, José Carlos Alves:
Implementation of Mixed Current/Voltage Testing Using the IEEE P1149.4 Infrastructure. ITC 1997: 509-517 - 1996
- [c1]José Carlos Alves, André T. Puga, Luís Corte-Real, José Silva Matos:
ProHos-1 - A Vector Processor for the Efficient Estimation of Higher-Order Moments. VECPAR 1996: 96-107
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