Allen C.-H. Wu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Daniel Gajski

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Publications

2000
[c29]
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Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul, Shojiro Mori, Tom Nukiyama, Pierre Bricaud:
Embedded tutorial: essential issues for IP reuse. ASP-DAC 2000: 37-42
1994
[j3]
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Tsing-Fa Lee, Allen C.-H. Wu, Youn-Long Lin, Daniel D. Gajski:
A transformation-based method for loop folding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(4): 439-450 (1994)
1992
[b1]
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Daniel D. Gajski, Nikil D. Dutt, Allen C.-H. Wu:
Youn-Long Steve Lin. Springer 1992, ISBN 978-1-4613-6617-1, pp. 1-359
[j2]
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  - journals/tcad/LarmoreGW92
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Lawrence L. Larmore, Daniel D. Gajski, Allen C.-H. Wu:
Layout placement for sliced architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(1): 102-114 (1992)
[j1]
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Allen C.-H. Wu, Daniel D. Gajski:
Partitioning algorithms for layout synthesis from register-transfer netlists. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(4): 453-463 (1992)
[c8]
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  - conf/eurodac/ChaiyakulWG92
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Viraphol Chaiyakul, Allen C.-H. Wu, Daniel D. Gajski:
Timing models for high-level synthesis. EURO-DAC 1992: 60-65
[c7]
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Tsing-Fa Lee, Allen C.-H. Wu, Daniel Gajski, Youn-Long Lin:
An effective methodology for functional pipelining. ICCAD 1992: 230-233
[c6]
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  - conf/iccad/WuHG92
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Allen C.-H. Wu, Tedd Hadley, Daniel Gajski:
An efficient multi-view design model for real-time interactive synthesis. ICCAD 1992: 328-331
[c5]
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  - conf/iccad/RamachandranKGWC92
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Champaka Ramachandran, Fadi J. Kurdahi, Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul:
Accurate layout area and delay modeling for system level design. ICCAD 1992: 355-361
1991
[c4]
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  - electronic edition @ acm.org
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Allen C.-H. Wu, Daniel D. Gajski:
Glue-logic partitioning for floorplans with a rectilinear datapath. EURO-DAC 1991: 162-166
[c3]
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Allen C.-H. Wu, Viraphol Chaiyakul, Daniel Gajski:
Layout-Area Models for High-Level Synthesis. ICCAD 1991: 34-37
1990
[c2]
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  - conf/eurodac/WuZG90
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Allen C.-H. Wu, Nels Vander Zanden, Daniel Gajski:
A new algorithm for transistor sizing in CMOS circuits. EURO-DAC 1990: 589-593
[c1]
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Allen C.-H. Wu, Daniel Gajski:
Partitioning Algorithms for Layout Synthesis from Register-Transfer Netlists. ICCAD 1990: 144-147

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