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Lech Józwiak
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Publications
- 2008
- [j26]Venkatesan Muthukumar, Lech Józwiak:
Editorial. J. Syst. Archit. 54(3-4): 347-348 (2008) - [c50]Lech Józwiak, Szymon Bieganski:
Technology Library Modelling for Information-driven Circuit Synthesis. DSD 2008: 480-489 - [c49]Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk:
High-Quality Circuit Synthesis for Modern Technologies. ISQED 2008: 168-173 - 2006
- [c44]Lech Józwiak, Aleksander Slusarczyk, Dominik Gawlowski:
Multi-objective Optimal FSM State Assignment. DSD 2006: 385-396 - [c42]Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk:
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems. ICSAMOS 2006: 177-184 - 2005
- [j24]Henry Selvaraj, Lech Józwiak:
Reconfigurable embedded systems: Synthesis, design and application. J. Syst. Archit. 51(6-7): 347-349 (2005) - [j23]Lech Józwiak, Szymon Bieganski, Artur Chojnacki:
Information-driven circuit synthesis with the pre-characterized gate libraries. J. Syst. Archit. 51(6-7): 405-423 (2005) - [c41]Lech Józwiak, Szymon Bieganski:
High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates. DSD 2005: 450-459 - 2004
- [j22]Lech Józwiak, Aleksander Slusarczyk:
General decomposition of incompletely specified sequential machines with multi-state behavior realization. J. Syst. Archit. 50(8): 445-492 (2004) - [c37]Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk:
An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods. DSD 2004: 160-167 - [c36]Lech Józwiak, Szymon Bieganski:
Information Trans-Coders in Information-Driven Circuit Synthesis. DSD 2004: 288-397 - 2003
- [j19]Lech Józwiak, Aleksander Slusarczyk, Artur Chojnacki:
Fast and compact sequential circuits for the FPGA-based reconfigurable systems. J. Syst. Archit. 49(4-6): 227-246 (2003) - [j18]Lech Józwiak, Artur Chojnacki:
Effective and efficient FPGA synthesis through general functional decomposition. J. Syst. Archit. 49(4-6): 247-265 (2003) - [c35]Lech Józwiak, Szymon Bieganski, Artur Chojnacki:
Information-driven Library-based Circuit Synthesis. DSD 2003: 148-157 - 2002
- [j15]Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak:
Learning Hardware Using Multiple-Valued Logic, Part 1: Introduction and Approach. IEEE Micro 22(3): 41-51 (2002) - [j14]Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak:
Learning Hardware Using Multiple-Valued Logic, Part 2: Cube Calculus and Architecture. IEEE Micro 22(3): 52-61 (2002) - [j13]Lech Józwiak, Aleksander Slusarczyk, Marek A. Perkowski:
Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR Circuits. VLSI Design 14(1): 107-122 (2002) - [c34]Aleksander Slusarczyk, Lech Józwiak:
Interoperability and Quality of New EDA Tools for Sequential Logic Synthesis. ISQED 2002: 87-92 - 2001
- [j12]Marek A. Perkowski, Lech Józwiak, William Zhao:
Symbolic two-dimensional minimization of strongly unspecified finite state machines. J. Syst. Archit. 47(1): 15-28 (2001) - [j11]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures. J. Syst. Archit. 47(2): 137-155 (2001) - [c33]Lech Józwiak, Artur Chojnacki:
High-quality sub-function construction in functional decomposition based on information relationship measures. DATE 2001: 383-390 - [c32]Lech Józwiak, Artur Chojnacki:
Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures. DSD 2001: 30-37 - [c31]Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk:
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. DSD 2001: 46-53 - [c30]Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Józwiak, Alan J. Coppola:
Regular Realization of Symmetric Functions Using Reversible Logic. DSD 2001: 245-253 - [c29]Artur Chojnacki, Lech Józwiak:
High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures. ISQED 2001: 409-414 - 2000
- [c28]Lech Józwiak, Aleksander Slusarczyk:
A New State Assignment Method Targeting FPGA Implementations. EUROMICRO 2000: 1050-1059 - [c27]Artur Chojnacki, Lech Józwiak:
Multi-Valued Sub-Function Encoding in Functional Decomposition Based on Information Relationships Measures. ISMVL 2000: 83-90 - 1999
- [c24]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
The Influence of the Number of Values in Sub-Functions on the Effectiveness and Efficiency of the Functional Decomposition. EUROMICRO 1999: 1086-1093 - [c23]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures. EUROMICRO 1999: 1094-1101 - [c22]Lech Józwiak, Artur Chojnacki:
Functional Decomposition based on Information Relationship Measures Extremely Effective and Efficient for Symmetric Functions. EUROMICRO 1999: 1150-1160 - [c20]Torrey Lewis, Marek A. Perkowski, Lech Józwiak:
Learning in Hardware: Architecture and Implementation of an FPGA-Based Rough Set Machine. EUROMICRO 1999: 1326-1334 - [c19]Rafal Rzechowski, Tadeusz Luba, Lech Józwiak:
Technology Driven Multilevel Logic Synthesis Based on Functional Decomposition into Gates. EUROMICRO 1999: 1368-1375 - 1998
- [c15]Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki:
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. EUROMICRO 1998: 10008-10015 - [c14]Michael Burns, Marek A. Perkowski, Lech Józwiak:
An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables. EUROMICRO 1998: 10016-10023 - [c12]Loc Bao Nguen, Marek A. Perkowski, Lech Józwiak:
Design of Self-Synchronized Component FSMs for Self-Timed Systems. EUROMICRO 1998: 10253-10260 - [c11]Mariusz Rawski, Lech Józwiak, Artur Chojnacki:
Application of the Information Measures to Input Support Selection in Functional Decomposition. Rough Sets and Current Trends in Computing 1998: 573-580 - 1997
- [c8]Sanof Mohamed, Marek A. Perkowski, Lech Józwiak:
Fast Minimization Of Multi-Output Boolean Functions In Sum-Of-Condition-Decoders Structures. EUROMICRO 1997: 31- - [c5]Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang:
Decomposition of Multiple-Valued Relations . ISMVL 1997: 13-18 - [c4]Stan Grygiel, Marek A. Perkowski, Malgorzata Marek-Sadowska, Tadeusz Luba, Lech Józwiak:
Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations. ISMVL 1997: 287-292
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