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Javier Navaridas
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2020 – today
- 2024
- [j31]Javier Navaridas, Jose Antonio Pascual, Julen Galarza, Txomin Romero, Juan L. Muñoz, Ibon Bustinduy:
On the parallelization of multipacting simulation codes for the design of particle accelerator components. J. Supercomput. 80(9): 12021-12042 (2024) - [j30]Javier Navaridas, Markos Kynigos, Jose Antonio Pascual, Mikel Luján, José Miguel-Alonso, John Goodacre:
Understanding the Impact of Arbitration in MZI-Based Beneš Switching Fabrics. IEEE Trans. Parallel Distributed Syst. 35(2): 338-348 (2024) - 2023
- [j29]Aitor Belenguer, Jose Antonio Pascual, Javier Navaridas:
GöwFed: A novel federated network intrusion detection system. J. Netw. Comput. Appl. 217: 103653 (2023) - [c46]Xabier Iturbe, Xabier Alberdi, Ander Aramburu, Armando Astarloa, Iñigo Barandiaran, Koldo Basterretxea, Angélica Dávila, Asier Erramuzpe, Iñigo Gabilondo, Garikoitz Lerma-Usabiaga, Lisandro Gabriel Monsalve, Libe Mori, Javier Navaridas, Jose Antonio Pascual, Joaquin Piriz, Serafim Rodrigues, Oscar Seijo, Ander Soraluze, Edgar Soria, Ignacio Torres, Nerea Uriarte, Juan Luis Valerdi:
SiliconBurmuin: A Horizon Europe propelled Neurocomputing Initiative in the Basque Country. SEAA 2023: 426-431 - [c45]Javier Navaridas, Jose Antonio Pascual:
QVal: A Novel Routing Algorithm for Dragonfly Networks. HPCC/DSS/SmartCity/DependSys 2023: 361-368 - [c44]Markos Kynigos, Javier Navaridas, Jose Antonio Pascual, Mikel Luján:
A Novel Simulation Methodology for Silicon Photonic Switching Fabrics. ISPASS 2023: 114-123 - [c43]Julen Galarza, Javier Navaridas, Jose Antonio Pascual, Txomin Romero, Juan L. Muñoz, Ibon Bustinduy:
Parallelizing Multipacting Simulation for the Design of Particle Accelerator Components. PDP 2023: 149-153 - 2022
- [i6]Aitor Belenguer, Javier Navaridas, Jose Antonio Pascual:
A review of Federated Learning in Intrusion Detection Systems for IoT. CoRR abs/2204.12443 (2022) - [i5]Aitor Belenguer, Jose Antonio Pascual, Javier Navaridas:
GowFed - A novel Federated Network Intrusion Detection System. CoRR abs/2210.16441 (2022) - 2021
- [j28]Markos Kynigos, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre:
On the routing and scalability of MZI-based optical Beneš interconnects. Nano Commun. Networks 27: 100337 (2021) - [c42]Markos Kynigos, Jose Antonio Pascual, Javier Navaridas, John Goodacre, Mikel Luján:
Power and energy efficient routing for Mach-Zehnder interferometer based photonic switches. ICS 2021: 177-189 - 2020
- [j27]Alejandro Erickson, Javier Navaridas, Iain A. Stewart:
Relating the bisection width of dual-port, server-centric datacenter networks and the solution of edge isoperimetric problems in graphs. J. Comput. Syst. Sci. 108: 10-28 (2020) - [j26]Joshua Lant, Javier Navaridas, Mikel Luján, John Goodacre:
Toward FPGA-Based HPC: Advancing Interconnect Technologies. IEEE Micro 40(1): 25-34 (2020) - [j25]Mohsen Ghasempour, Jonathan Heathcote, Javier Navaridas, Luis A. Plana, Jim D. Garside, Mikel Luján:
Analysis of software and hardware-accelerated approaches to the simulation of unconventional interconnection networks. Simul. Model. Pract. Theory 103: 102088 (2020) - [c41]Dirk Koch, Frank Hannig, Javier Navaridas:
Message from the Conference Chairs - ASAP 2020. ASAP 2020: i-ii
2010 – 2019
- 2019
- [j24]Joshua Lant, Caroline Concatto, Andrew Attwood, Jose Antonio Pascual, Mike Ashworth, Javier Navaridas, Mikel Luján, John Goodacre:
Enabling shared memory communication in networks of MPSoCs. Concurr. Comput. Pract. Exp. 31(21) (2019) - [j23]Jose Antonio Pascual, Joshua Lant, Caroline Concatto, Andrew Attwood, Javier Navaridas, Mikel Luján, John Goodacre:
On the effects of allocation strategies for exascale computing systems with distributed storage and unified interconnects. Concurr. Comput. Pract. Exp. 31(21) (2019) - [j22]Javier Navaridas, Jose Antonio Pascual, Alejandro Erickson, Iain A. Stewart, Mikel Luján:
INRFlow: An interconnection networks research flow-level simulation framework. J. Parallel Distributed Comput. 130: 140-152 (2019) - [c40]Joshua Lant, Andrew Attwood, Javier Navaridas, Mikel Luján, John Goodacre:
Receive-Side Notification for Enhanced RDMA in FPGA Based Networks. ARCS 2019: 224-235 - [c39]Joshua Lant, Javier Navaridas, Andrew Attwood, Mikel Luján, John Goodacre:
Enabling Standalone FPGA Computing. Hot Interconnects 2019: 23-26 - [c38]Javier Navaridas, Joshua Lant, Jose Antonio Pascual, Mikel Luján, John Goodacre:
Design Exploration of Multi-tier Interconnection Networks for Exascale Systems. ICPP 2019: 49:1-49:10 - [c37]Thales Bandiera Paiva, Javier Navaridas, Routo Terada:
Robust Covert Channels Based on DRAM Power Consumption. ISC 2019: 319-338 - [c36]Markos Kynigos, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre:
Scalability analysis of optical Beneš networks based on thermally/electrically tuned Mach-Zehnder interferometers. NoCArc@MICRO 2019: 9:1-9:6 - [i4]Anthony Kleerekoper, Javier Navaridas, Mikel Luján:
Can the Optimizer Cost be Used to Predict Query Execution Times? CoRR abs/1905.00774 (2019) - 2018
- [j21]Sebastian Werner, Javier Navaridas, Mikel Luján:
A Survey on Optical Network-on-Chip Architectures. ACM Comput. Surv. 50(6): 89:1-89:37 (2018) - [j20]Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten:
Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. Microprocess. Microsystems 61: 58-71 (2018) - [c35]Caroline Concatto, Jose Antonio Pascual, Javier Navaridas, Joshua Lant, Andrew Attwood, Mikel Luján, John Goodacre:
A CAM-Free Exascalable HPC Router for Low-Energy Communications. ARCS 2018: 99-111 - [c34]Markos Kynigos, Javier Navaridas, Luis A. Plana, Steve B. Furber:
Network-on-chip evaluation for a novel neural architecture. CF 2018: 216-219 - [c33]Jose Antonio Pascual, Javier Navaridas:
High-Performance, Low-Complexity Deadlock Avoidance for Arbitrary Topologies/Routings. ICS 2018: 129-138 - 2017
- [j19]Alejandro Erickson, Iain A. Stewart, Javier Navaridas, Abbas Eslami Kiasari:
The stellar transformation: From interconnection networks to datacenter networks. Comput. Networks 113: 29-45 (2017) - [j18]Alejandro Erickson, Iain A. Stewart, Jose Antonio Pascual, Javier Navaridas:
Improved routing algorithms in the dual-port datacenter networks HCN and BCN. Future Gener. Comput. Syst. 75: 58-71 (2017) - [j17]Sebastian Werner, Javier Navaridas, Mikel Luján:
Efficient Sharing of Optical Resources in Low-Power Optical Networks-on-Chip. JOCN 9(5): 364-374 (2017) - [j16]Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
An Optimal Single-Path Routing Algorithm in the Datacenter Network DPillar. IEEE Trans. Parallel Distributed Syst. 28(3): 689-703 (2017) - [j15]Guangda Zhang, Wei Song, Jim D. Garside, Javier Navaridas, Zhiying Wang:
Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3152-3165 (2017) - [c32]Jose Antonio Pascual, Joshua Lant, Andrew Attwood, Caroline Concatto, Javier Navaridas, Mikel Luján, John Goodacre:
Designing an exascale interconnect using multi-objective optimization. CEC 2017: 2209-2216 - [c31]Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Nikolaos Chrysos, Manolis Katevenis:
The Next Generation of Exascale-Class Systems: The ExaNeSt Project. DSD 2017: 510-515 - [c30]Jose Antonio Pascual, Caroline Concatto, Joshua Lant, Javier Navaridas:
On the Effects of Data-Aware Allocation on Fully Distributed Storage Systems for Exascale. Euro-Par Workshops 2017: 725-736 - [c29]Sebastian Werner, Javier Navaridas, Mikel Luján:
Subchannel Scheduling for Shared Optical On-chip Buses. Hot Interconnects 2017: 49-56 - [c28]Sebastian Werner, Javier Navaridas, Mikel Luján:
Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links. HPCA 2017: 265-276 - 2016
- [j14]Yaman Cakmaki, Will Toms, Javier Navaridas, Mikel Luján:
Cyclic Power-Gating as an Alternative to Voltage and Frequency Scaling. IEEE Comput. Archit. Lett. 15(2): 77-80 (2016) - [j13]Sebastian Werner, Javier Navaridas, Mikel Luján:
A Survey on Design Approaches to Circumvent Permanent Faults in Networks-on-Chip. ACM Comput. Surv. 48(4): 59:1-59:36 (2016) - [c27]Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, Nikolaos D. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, Giuliano Taffoni, Stefano Cozzini, Martin L. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, Bernd Lietzow, D. Everett, Gino Perna:
The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems. DSD 2016: 60-67 - 2015
- [j12]Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber:
SpiNNaker: Enhanced multicast routing. Parallel Comput. 45: 49-66 (2015) - [c26]Guangda Zhang, Jim D. Garside, Wei Song, Javier Navaridas, Zhiying Wang:
Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults. ASYNC 2015: 100-107 - [c25]Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
An Efficient Shortest-Path Routing Algorithm in the Data Centre Network DPillar. COCOA 2015: 209-220 - [c24]Mohsen Ghasempour, Jonathan Heathcote, Javier Navaridas, Luis A. Plana, Jim D. Garside, Mikel Luján:
Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study. FCCM 2015: 96 - [c23]Sebastian Werner, Javier Navaridas, Mikel Luján:
Amon: An Advanced Mesh-like Optical NoC. Hot Interconnects 2015: 52-59 - [c22]Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
On Routing Algorithms for the DPillar Data Centre Networks. ICA3PP (4) 2015: 329-343 - [c21]Geoffrey Ndu, Javier Navaridas, Mikel Luján:
CHO: towards a benchmark suite for OpenCL FPGA accelerators. IWOCL 2015: 10:1-10:10 - [c20]Mohsen Ghasempour, Jonathan Heathcote, Javier Navaridas, Luis A. Plana, Jim D. Garside, Mikel Luján:
Analysis of FPGA and software approaches to simulate unconventional computer architectures. ReConFig 2015: 1-8 - [c19]Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
Routing Algorithms for Recursively-Defined Data Centre Networks. TrustCom/BigDataSE/ISPA (3) 2015: 84-91 - [i3]Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
An efficient shortest-path routing algorithm in the data centre network {DP}illar. CoRR abs/1509.01746 (2015) - [i2]Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas, Iain A. Stewart:
Routing Algorithms for Recursively-Defined Data Centre Networks. CoRR abs/1509.01747 (2015) - [i1]Alejandro Erickson, Iain A. Stewart, Javier Navaridas, Abbas Eslami Kiasari:
Star-Replaced Networks: A Generalised Class of Dual-Port Server-Centric Data Centre Networks. CoRR abs/1510.02181 (2015) - 2014
- [j11]Guangda Zhang, Wei Song, Jim D. Garside, Javier Navaridas, Zhiying Wang:
Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes. Microprocess. Microsystems 38(8): 826-842 (2014) - [c18]Guangda Zhang, Wei Song, Jim D. Garside, Javier Navaridas, Zhiying Wang:
An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults. ASYNC 2014: 9-16 - [c17]Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber:
On generating multicast routes for SpiNNaker. Conf. Computing Frontiers 2014: 2:1-2:10 - [c16]Oriol Arcas-Abella, Geoffrey Ndu, Nehir Sönmez, Mohsen Ghasempour, Adrià Armejach, Javier Navaridas, Wei Song, John Mawer, Adrián Cristal, Mikel Luján:
An empirical evaluation of High-Level Synthesis languages and tools for database acceleration. FPL 2014: 1-8 - 2013
- [j10]Javier Navaridas, Steve B. Furber, Jim D. Garside, Xin Jin, Mukaram M. Khan, David R. Lester, Mikel Luján, José Miguel-Alonso, Eustace Painkras, Cameron Patterson, Luis A. Plana, Alexander D. Rast, Dominic Richards, Yebin Shi, Steve Temple, Jian Wu, Shufan Yang:
SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture. Parallel Comput. 39(11): 693-708 (2013) - [c15]Guangda Zhang, Wei Song, Jim D. Garside, Javier Navaridas, Zhiying Wang:
Transient Fault Tolerant QDI Interconnects Using Redundant Check Code. DSD 2013: 3-10 - 2012
- [j9]Alexander D. Rast, Javier Navaridas, Xin Jin, Francesco Galluppi, Luis A. Plana, José Miguel-Alonso, Cameron Patterson, Mikel Luján, Steve B. Furber:
Managing Burstiness and Scalability in Event-Driven Models on the SpiNNaker Neuromimetic System. Int. J. Parallel Program. 40(6): 553-582 (2012) - [j8]Cameron Patterson, Jim D. Garside, Eustace Painkras, Steve Temple, Luis A. Plana, Javier Navaridas, Thomas Sharp, Steve B. Furber:
Scalable communications for a million-core neural processing architecture. J. Parallel Distributed Comput. 72(11): 1507-1520 (2012) - [c14]Javier Navaridas, Mikel Luján, Luis A. Plana, José Miguel-Alonso, Stephen B. Furber:
Analytical Assessment of the Suitability of Multicast Communications for the SpiNNaker Neuromimetic System. HPCC-ICESS 2012: 1-8 - [c13]Sergio Davies, Javier Navaridas, Francesco Galluppi, Steve B. Furber:
Population-based routing in the SpiNNaker neuromorphic architecture. IJCNN 2012: 1-8 - [c12]Javier Navaridas, Behram Khan, Salman Khan, Paolo Faraboschi, Mikel Luján:
Reservation-based Network-on-Chip Timing Models for Large-scale Architectural Simulation. NOCS 2012: 91-98 - 2011
- [j7]Javier Navaridas, José Miguel-Alonso:
Indirect cube: A power-efficient topology for compute clusters. Opt. Switch. Netw. 8(3): 162-170 (2011) - [j6]Mukaram M. Khan, Alexander D. Rast, Javier Navaridas, X. Jin, Luis A. Plana, Mikel Luján, Steve Temple, Cameron Patterson, Dominic Richards, John V. Woods, José Miguel-Alonso, Stephen B. Furber:
Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric. Parallel Comput. 37(8): 392-409 (2011) - [j5]Javier Navaridas, José Miguel-Alonso, Jose Antonio Pascual, Francisco Javier Ridruejo:
Simulating and evaluating interconnection networks with INSEE. Simul. Model. Pract. Theory 19(1): 494-515 (2011) - 2010
- [j4]Javier Navaridas, José Miguel-Alonso, Francisco Javier Ridruejo, Wolfgang E. Denzel:
Reducing complexity in tree-like computer interconnection networks. Parallel Comput. 36(2-3): 71-85 (2010) - [j3]José M. Cámara, Miquel Moretó, Enrique Vallejo, Ramón Beivide, José Miguel-Alonso, Carmen Martínez, Javier Navaridas:
Twisted Torus Topologies for Enhanced Interconnection Networks. IEEE Trans. Parallel Distributed Syst. 21(12): 1765-1778 (2010) - [c11]Javier Navaridas, Luis A. Plana, José Miguel-Alonso, Mikel Luján, Stephen B. Furber:
SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection network. Conf. Computing Frontiers 2010: 11-20
2000 – 2009
- 2009
- [j2]Francisco Javier Ridruejo, José Miguel-Alonso, Javier Navaridas:
Full-system simulation of distributed memory multicomputers. Clust. Comput. 12(3): 309-322 (2009) - [j1]José Miguel-Alonso, Javier Navaridas, Francisco Javier Ridruejo Perez:
Interconnection Network Simulation Using Traces of MPI Applications. Int. J. Parallel Program. 37(2): 153-174 (2009) - [c10]Javier Navaridas, Mikel Luján, José Miguel-Alonso, Luis A. Plana, Steve B. Furber:
Understanding the interconnection network of SpiNNaker. ICS 2009: 286-295 - [c9]Muhammad Mukaram Khan, Javier Navaridas, Alexander D. Rast, Xin Jin, Luis A. Plana, Mikel Luján, John V. Woods, José Miguel-Alonso, Steve B. Furber:
Event-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric. ISPDC 2009: 54-61 - [c8]Javier Navaridas, José Miguel-Alonso:
Realistic Evaluation of Interconnection Networks Using Synthetic Traffic. ISPDC 2009: 249-252 - [c7]Jose Antonio Pascual, Javier Navaridas, José Miguel-Alonso:
Effects of Topology-Aware Allocation Policies on Scheduling Performance. JSSPP 2009: 138-156 - [c6]Javier Navaridas, Jose Antonio Pascual, José Miguel-Alonso:
Effects of Job and Task Placement on Parallel Scientific Applications Performance. PDP 2009: 55-61 - 2008
- [c5]Javier Navaridas, José Miguel-Alonso, Francisco Javier Ridruejo Perez:
On synthesizing workloads emulating MPI applications. IPDPS 2008: 1-8 - 2007
- [c4]Javier Navaridas, Francisco Javier Ridruejo Perez, José Miguel-Alonso:
Evaluation of Interconnection Networks Using Full-System Simulators: Lessons Learned. Annual Simulation Symposium 2007: 155-162 - [c3]Francisco Javier Ridruejo Perez, José Miguel-Alonso, Javier Navaridas:
Concepts and components of full-system simulation of distributed memory parallel computers. HPDC 2007: 225-226 - [c2]José M. Cámara, Miquel Moretó, Enrique Vallejo, Ramón Beivide, José Miguel-Alonso, Carmen Martínez, Javier Navaridas:
Mixed-radix Twisted Torus Interconnection Networks. IPDPS 2007: 1-10 - [c1]Francisco Javier Ridruejo Perez, Javier Navaridas, José Miguel-Alonso, Cruz Izu:
Realistic Evaluation of Interconnection Network Performance at High Loads. PDCAT 2007: 97-104
Coauthor Index
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last updated on 2024-10-07 22:11 CEST by the dblp team
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