The Journal of VLSI Signal Processing, Volume 19
Volume 19, Number 1, May 1998
Alberto Broggi, Gianni Conte, Francesco Gregoretti, Claudio Sansoè, Roberto Passerone, Leonardo Maria Reyneri: Design and Implementation of the PAPRICA Parallel Architecture. 5-18- Karl-Heinz Zimmermann, Wolfgang Achtziger: On Time Optimal Implementation of Uniform Recurrences onto Array Processors via Quadratic Programming. 19-38
- Jaehee You, Sang Uk Lee: High Throughput, Scalable VLSI Architecture for Block Matching Motion Estimation. 39-50
- Yen-Kuang Chen, Sun-Yuan Kung: A Systolic Design Methodology with Application to Full-Search Block-Matching Architectures. 51-77
Volume 19, Number 2, July 1998
- Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens: A Parallel ASIC Architecture for Efficient Fractal Image Coding. 97-113
- Jeffrey D. Hirschberg, David M. Dahle, Kevin Karplus, Don Speck, Richard Hughey: Kestrel: A Programmable Array for Sequence Analysis. 115-126
- Julio Villalba, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera: Radix-4 Vectoring CORDIC Algorithm and Architectures. 127-147
- Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller: A New Euclidean Division Algorithm for Residue Number Systems. 167-178
- Hyuk-Jae Lee, José A. B. Fortes: Automatic Generation of Modular Time-Space Mappings and Data Alignments. 195-208
Volume 19, Number 3, August 1998
- Robert Michael Owens, Mohan Vishwanath: A Very Efficient Storage Structure for DWT and IDWT Filters. 215-225
- Julio Villalba, Tomás Lang, Emilio L. Zapata: Parallel Compensation of Scale Factor for the CORDIC Algorithm. 227-241
- Yun-Nan Chang, Ching-Yi Wang, Keshab K. Parhi: Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units. 243-256
- J. G. Liu, H. F. Li, Francis H. Y. Chan, Francis K. Lam: Fast Discrete Cosine Transform via Computation of Moments. 257-268
- Chaeryung Park, Taewhan Kim, C. L. Liu: Register Allocation - A Hierarchical Reduction Approach. 269-285
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