7. FPGA 1999:
Monterey, CA, USA
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conf/fpga/KaptanogluBKCT99 export record as
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conf/fpga/AgrawalCSSNWTFH99 export record as
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André DeHon :
Balancing Interconnect and Computation in a Reconfiguable Computing Array (or, why you don't really want 100% LUT utilization).
69-78
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William Tsu ,
Kip Macy ,
Atul Joshi ,
Randy Huang ,
Norman Walker ,
Tony Tung ,
Omid Rowhani ,
George Varghese ,
John Wawrzynek ,
André DeHon :
HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array.
125-134
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Luigi Carro :
Architecture Considerations for Mixed Signals FPGAs.
245
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conf/fpga/SklyarovFMOMLKSNF99 export record as
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Chris Dick :
High-Performance 2-D FPGA DCTs Using Polynomial Transforms.
249
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John McCluskey :
High Speed Calculation of Cyclic Redundancy Codes.
250
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John McCluskey :
Practical Applications of Recursive VHDL Components in FPGA Synthesis.
252
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Philippe Soulard :
Prototyping Board and Development Environment for Rapid Prototyping of Real Time and Regular Digital Signal Processing Application.
252
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Andreas Koch :
Unified Access to Heterogeneous Module Generators.
254
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