"HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array."

William Tsu et al. (1999)

> Home

Details and statistics

DOI: 10.1145/296399.296442

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpga/TsuMJHWTRVWD99
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/TsuMJHWTRVWD99
William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omid Rowhani, George Varghese, John Wawrzynek, André DeHon:
HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array. FPGA 1999: 125-134

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.