CODES+ISSS 2010: Scottsdale, AZ, USA

Keynote talk

Application-specific algorithms and architectures

Reconfigurable and real-time system

Special session

Optimising multiprocessor and NoC platforms for performance, QoS, and reliability

Power-aware design

MPSoC: analysis and synthesis

Memory and communication architecture

Embedded tutorial

Memory architecture for embedded systems

New design approaches for network-on-chip systems

Novel techniques for accelerating system simulation

Embedded software performance optimization

Reliability and memory issues in MPSoCs

Special session

Tutorials

maintained by Schloss Dagstuhl LZI at University of Trier