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ORCID5th Conference On Computing Frontiers 2008: Ischia, Italy
- Alex Ramírez, Gianfranco Bilardi, Michael Gschwind:
Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008. ACM 2008, ISBN 978-1-60558-077-7
Keynote 1
- Valentina Salapura:
Scaling up next generation supercomputers. 1-2
Innovative computing platforms I (cell)
- Catherine H. Crawford, Paul Henning, Michael Kistler, Cornell Wright:
Accelerating computing with the cell broadband engine processor. 3-12 - Ashwin M. Aji, Wu-chun Feng, Filip Blagojevic, Dimitrios S. Nikolopoulos
:
Cell-SWat: modeling and scheduling wavefront computations on the cell broadband engine. 13-22 - M. Mustafa Rafique, Ali Raza Butt, Dimitrios S. Nikolopoulos:
DMA-based prefetching for i/o-intensive workloads on the cell architecture. 23-32 - Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Petrini:
Exact multi-pattern string matching on the cell/b.e. processor. 33-42
Programming models
- Tetsuo Yokoyama, Holger Bock Axelsen, Robert Glück:
Principles of a reversible programming language. 43-54 - Xingzhi Wen, Uzi Vishkin:
Fpga-based prototype of a pram-on-chip processor. 55-66 - Cristian Perfumo, Nehir Sönmez, Srdjan Stipic, Osman S. Unsal, Adrián Cristal, Tim Harris, Mateo Valero:
The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment. 67-78
HPC
- Maria Eleftheriou, Blake G. Fitch, Aleksandr Rayshubskiy, T. J. Christopher Ward, Philip Heidelberger, Robert S. Germain:
A study of the effects of machine geometry and mapping on distributed transpose performance. 79-86 - Kornilios Kourtis, Georgios I. Goumas, Nectarios Koziris:
Optimizing sparse matrix-vector multiplication using index and value compression. 87-96 - Michael A. Kochte, Ramesh Natarajan:
A framework for scheduling parallel dbms user-defined programs on an attached high-performance computer. 97-104
Poster session
- Valeri Kirischian, Vadim Geurkov, Lev Kirischian:
A multi-mode video-stream processor with cyclically reconfigurable architecture. 105-106 - Jing Du, Xuejun Yang, Zhiyun Wang:
Effective runtime scalability metric to measure productivity in high performance computing systems. 107-108 - Pedro Trancoso, Artemakis Artemiou:
Exploiting the GPU to accelerate DSS query execution. 109-110 - Fabrizio Baiardi, Daniele Sgandurra:
Virtual interacting network community: exploiting multi-core architectures to increase security. 111-112 - Subhash Saini, Dennis C. Jespersen, Dale Talcott, M. Jahed Djomehri, Timothy Sandstrom:
Application-based early performance evaluation of SGI altix 4700 systems for SGI systems. 113-114 - Radu Calinescu:
Methodology for the model-driven development of self-managing systems. 115-116
Keynote II
- Keshav Pingali:
Data-parallel abstractions for irregular programs. 117-118
Innovative microarchitecture I
- Major Bhadauria, Sally A. McKee:
Optimizing thread throughput for multithreaded workloads on memory constrained CMPs. 119-128 - Bogdan F. Romanescu, Michael E. Bauer, Sule Ozev, Daniel J. Sorin:
Reducing the impact of intra-core process variability with criticality-based resource allocation and prefetching. 129-138 - John Y. Oliver, Rajeevan Amirtharajah, Venkatesh Akella, Frederic T. Chong:
Credit-based dynamic reliability management using online wearout detection. 139-148 - Frederico Pratas, Georgi Gaydadjiev, Mladen Berekovic, Leonel Sousa, Stefanos Kaxiras:
Low power microarchitecture with instruction reuse. 149-158
Innovative design
- Gabriel H. Loh:
A modular 3d processor for flexible product design and technology migration. 159-170 - Shruti R. Patil, Xiaofeng Yao, Hao Meng, Jianping Wang, David J. Lilja:
Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions. 171-178 - Paul Tarau, Brenda Luderman:
Exact combinational logic synthesis and non-standard circuit design. 179-188
Compilation
- Kevin Williams, Albert Noll, Andreas Gal, David Gregg:
Optimization strategies for a java virtual machine interpreter on the cell broadband engine. 189-198 - Dorit Nuzman, Mircea Namolaru, Ayal Zaks, Jeff H. Derby:
Compiling for an indirect vector register architecture. 199-208 - Arun Rangasamy, Rahul Nagpal, Y. N. Srikant:
Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture. 209-218
Keynote III
- Raffaele Tripiccione:
JANUS: reconfigurable high-performance computing for physics. 219-220
Innovative microarchitecture II
- Marcus Komann, Alexander Kröller, Christiane Schmidt, Dietmar Fey, Sándor P. Fekete:
Emergent algorithms for centroid and orientation detection in high-performance embedded cameras. 221-230 - Christos Strydis, Di Zhu, Georgi Gaydadjiev:
Profiling of symmetric-encryption algorithms for a novel biomedical-implant architecture. 231-240 - Weirong Jiang, Viktor K. Prasanna:
Multi-terabit ip lookup using parallel bidirectional pipelines. 241-250 - Peng Zhou, Soner Önder:
Improving single-thread performance with fine-grain state maintenance. 251-260
Innovative computing platforms II (GPGP)
- Sam S. Stone, Justin P. Haldar, Stephanie C. Tsao, Wen-mei W. Hwu, Zhi-Pei Liang, Bradley P. Sutton:
Accelerating advanced mri reconstructions on gpus. 261-272 - Christopher I. Rodrigues, David J. Hardy, John E. Stone, Klaus Schulten, Wen-mei W. Hwu:
GPU acceleration of cutoff pair potentials for molecular modeling applications. 273-282 - Maraike Schellmann, Jürgen Vörding, Sergei Gorlatch, Dominik Meiländer:
Cost-effective medical image reconstruction: from clusters to graphics processing units. 283-292
Systems
- Clinton Wills Smullen IV, Shahrukh Rohinton Tarapore, Sudhanva Gurumurthi, Parthasarathy Ranganathan, Mustafa Uysal:
Active storage revisited: the case for power and performance benefits for unstructured data processing applications. 293-304 - Hai Jin, Yongcai Tao, Song Wu, Xuanhua Shi:
Scalable dht-based information service for large-scale grids. 305-312 - Trilce Estrada, Olac Fuentes, Michela Taufer:
A distributed evolutionary method to design scheduling policies for volunteer computing. 313-322
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