default search action
Search dblp
Full-text search
- > Home
Please enter a search query
- case-insensitive prefix search: default
e.g., sig matches "SIGIR" as well as "signal" - exact word search: append dollar sign ($) to word
e.g., graph$ matches "graph", but not "graphics" - boolean and: separate words by space
e.g., codd model - boolean or: connect words by pipe symbol (|)
e.g., graph|network
Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.
Author search results
no matches
Venue search results
no matches
Refine list
refine by author
- no options
- temporarily not available
refine by venue
- no options
- temporarily not available
refine by type
- no options
- temporarily not available
refine by access
- no options
- temporarily not available
refine by year
- no options
- temporarily not available
Publication search results
found 41 matches
- 2020
- Tarek S. Abdelrahman:
Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System. ACM Trans. Archit. Code Optim. 17(3): 20:1-20:24 (2020) - Aravind Acharya, Uday Bondhugula, Albert Cohen:
Effective Loop Fusion in Polyhedral Compilation Using Fusion Conflict Graphs. ACM Trans. Archit. Code Optim. 17(4): 26:1-26:26 (2020) - Karel Adámek, Sofia Dimoudi, Mike B. Giles, Wesley Armour:
GPU Fast Convolution via the Overlap-and-Save Method in Shared Memory. ACM Trans. Archit. Code Optim. 17(3): 18:1-18:20 (2020) - Utpal Bora, Santanu Das, Pankaj Kukreja, Saurabh Joshi, Ramakrishna Upadrasta, Sanjay V. Rajopadhye:
LLOV: A Fast Static Data-Race Checker for OpenMP Programs. ACM Trans. Archit. Code Optim. 17(4): 35:1-35:26 (2020) - Rolando Brondolin, Marco D. Santambrogio:
A Black-box Monitoring Approach to Measure Microservices Runtime Performance. ACM Trans. Archit. Code Optim. 17(4): 34:1-34:26 (2020) - Mustafa Cavus, Resit Sendag, Joshua J. Yi:
Informed Prefetching for Indirect Memory Accesses. ACM Trans. Archit. Code Optim. 17(1): 4:1-4:29 (2020) - Luca Cerina, Marco D. Santambrogio, Giuseppe Franco, Claudio Gallicchio, Alessio Micheli:
EchoBay: Design and Optimization of Echo State Networks under Memory and Time Constraints. ACM Trans. Archit. Code Optim. 17(3): 22:1-22:24 (2020) - Stefano Cherubin, Daniele Cattaneo, Michele Chiari, Giovanni Agosta:
Dynamic Precision Autotuning with TAFFO. ACM Trans. Archit. Code Optim. 17(2): 10:1-10:26 (2020) - George Christou, Giorgos Vasiliadis, Vassilis Papaefstathiou, Antonis Papadogiannakis, Sotiris Ioannidis:
On Architectural Support for Instruction Set Randomization. ACM Trans. Archit. Code Optim. 17(4): 36:1-36:26 (2020) - Arnab Das, Sriram Krishnamoorthy, Ian Briggs, Ganesh Gopalakrishnan, Ramakrishna Tipireddy:
FPDetect: Efficient Reasoning About Stencil Programs Using Selective Direct Evaluation. ACM Trans. Archit. Code Optim. 17(3): 19:1-19:27 (2020) - Albin Eldstål-Ahrens, Ioannis Sourdis:
MemSZ: Squeezing Memory Traffic with Lossy Compression. ACM Trans. Archit. Code Optim. 17(4): 40:1-40:25 (2020) - Ahmet Erdem, Cristina Silvano, Thomas Boesch, Andrea C. Ornstein, Surinder Pal Singh, Giuseppe Desoli:
Runtime Design Space Exploration and Mapping of DCNNs for the Ultra-Low-Power Orlando SoC. ACM Trans. Archit. Code Optim. 17(2): 11:1-11:25 (2020) - Muhammad Huzaifa, Johnathan Alsop, Abdulrahman Mahmoud, Giordano Salvador, Matthew D. Sinclair, Sarita V. Adve:
Inter-kernel Reuse-aware Thread Block Scheduling. ACM Trans. Archit. Code Optim. 17(3): 24:1-24:27 (2020) - Lijuan Jiang, Chao Yang, Wenjing Ma:
Enabling Highly Efficient Batched Matrix Multiplications on SW26010 Many-core Processor. ACM Trans. Archit. Code Optim. 17(1): 3:1-3:23 (2020) - David R. Kaeli:
Editorial: A Message from the Editor-in-Chief. ACM Trans. Archit. Code Optim. 17(3): 16:1-16:2 (2020) - Charu Kalra, Fritz Previlon, Norm Rubin, David R. Kaeli:
ArmorAll: Compiler-based Resilience Targeting GPU Applications. ACM Trans. Archit. Code Optim. 17(2): 9:1-9:24 (2020) - Jaekyu Lee, Yasuo Ishii, Dam Sunwoo:
Securing Branch Predictors with Two-Level Encryption. ACM Trans. Archit. Code Optim. 17(3): 21:1-21:25 (2020) - Yuhao Li, Dan Sun, Benjamin C. Lee:
Dynamic Colocation Policies with Reinforcement Learning. ACM Trans. Archit. Code Optim. 17(1): 1:1-1:25 (2020) - Jhe-Yu Liou, Xiaodong Wang, Stephanie Forrest, Carole-Jean Wu:
GEVO: GPU Code Optimization Using Evolutionary Computation. ACM Trans. Archit. Code Optim. 17(4): 33:1-33:28 (2020) - Steffen Maass, Mohan Kumar Kumar, Taesoo Kim, Tushar Krishna, Abhishek Bhattacharjee:
ECOTLB: Eventually Consistent TLBs. ACM Trans. Archit. Code Optim. 17(4): 27:1-27:24 (2020) - Dennis Pinto, José-María Arnau, Antonio González:
Design and Evaluation of an Ultra Low-power Human-quality Speech Recognition System. ACM Trans. Archit. Code Optim. 17(4): 41:1-41:19 (2020) - Anchu Rajendran, V. Krishna Nandivada:
DisGCo: A Compiler for Distributed Graph Analytics. ACM Trans. Archit. Code Optim. 17(4): 28:1-28:26 (2020) - Cristóbal Ramírez, César-Alejandro Hernández-Calderón, Oscar Palomar, Osman S. Unsal, Marco Antonio Ramírez, Adrián Cristal:
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures. ACM Trans. Archit. Code Optim. 17(4): 38:1-38:30 (2020) - Ram Rangan, Mark W. Stephenson, Aditya Ukarande, Shyam Murthy, Virat Agarwal, Marc Blackstein:
Zeroploit: Exploiting Zero Valued Operands in Interactive Gaming Applications. ACM Trans. Archit. Code Optim. 17(3): 17:1-17:26 (2020) - Gokul Subramanian Ravi, Joshua San Miguel, Mikko H. Lipasti:
SHASTA: Synergic HW-SW Architecture for Spatio-temporal Approximation. ACM Trans. Archit. Code Optim. 17(4): 25:1-25:26 (2020) - Amir Hossein Nodehi Sabet, Junqiao Qiu, Zhijia Zhao, Sriram Krishnamoorthy:
Reliability Analysis for Unreliable FSM Computations. ACM Trans. Archit. Code Optim. 17(2): 12:1-12:23 (2020) - Xuanhua Shi, Wei Liu, Ligang He, Hai Jin, Ming Li, Yong Chen:
Optimizing the SSD Burst Buffer by Traffic Detection. ACM Trans. Archit. Code Optim. 17(1): 8:1-8:26 (2020) - Savvas Sioutas, Sander Stuijk, Twan Basten, Henk Corporaal, Lou J. Somers:
Schedule Synthesis for Halide Pipelines on GPUs. ACM Trans. Archit. Code Optim. 17(3): 23:1-23:25 (2020) - Yang Song, Bill Lin:
Improving Memory Efficiency in Heterogeneous MPSoCs through Row-Buffer Locality-aware Forwarding. ACM Trans. Archit. Code Optim. 17(1): 6:1-6:26 (2020) - Athanasios Stratikopoulos, Christos Kotselidis, John Goodacre, Mikel Luján:
FastPath_MP: Low Overhead & Energy-efficient FPGA-based Storage Multi-paths. ACM Trans. Archit. Code Optim. 17(4): 37:1-37:23 (2020)
skipping 11 more matches
loading more results
failed to load more results, please try again later
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
retrieved on 2024-11-03 20:01 CET from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint