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Publication search results
found 301 matches
- 2023
- Martin Lefebvre, Denis Flandre, David Bol:
A 1.1-/0.9-nA Temperature-Independent 213-/565-ppm/°C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI. IEEE J. Solid State Circuits 58(8): 2239-2251 (2023) - Qian Chen, Chirn Chye Boon, Qing Liu, Yuan Liang:
A Single-Channel Voltage-Scalable 8-GS/s 8-b >37.5-dB SNDR Time-Domain ADC With Asynchronous Pipeline Successive Approximation in 28-nm CMOS. IEEE J. Solid State Circuits 58(6): 1610-1622 (2023) - Hany Abolmagd, Raghav Subbaraman, Omid Esmaeeli, Yeswanth Guntupalli, Ahmad Sharkia, Dinesh Bharadia, Sudip Shekhar:
A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52-70-dB RF Cancellation. IEEE J. Solid State Circuits 58(5): 1323-1336 (2023) - Hamidreza Afzal, Cheng Li, Omeed Momeni:
A Highly Efficient 165-GHz 4FSK 17-Gb/s Transceiver System With Frequency Overlapping Architecture in 65-nm CMOS. IEEE J. Solid State Circuits 58(11): 3113-3126 (2023) - Fatemeh Aghlmand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami:
A 65-nm CMOS Fluorescence Sensor for Dynamic Monitoring of Living Cells. IEEE J. Solid State Circuits 58(11): 3003-3019 (2023) - Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas William Brown, Brent R. Carlton, Christopher Dennis Hull, Steven Callender, Stefano Pellerano:
A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. IEEE J. Solid State Circuits 58(12): 3364-3379 (2023) - Abdelrahman H. Ahmed, Leonardo Vera, Lorenzo Iotti, Ruizhi Shi, Sudip Shekhar, Alexander V. Rylyakov:
A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength. IEEE J. Solid State Circuits 58(8): 2202-2213 (2023) - Reza Ehsani Alashti, Shahabeddin Mohin, Fatemeh Tavana, Mehrdad Sharif Bakhtiar:
Digital to RF Wideband Multi-Standard Multi-Path Transmitter. IEEE J. Solid State Circuits 58(7): 1928-1944 (2023) - Soroush Araei, Shahabeddin Mohin, Negar Reiskarimian:
Harmonic-Resilient Fully Passive Mixer-First Receiver for Software-Defined Radios. IEEE J. Solid State Circuits 58(12): 3396-3407 (2023) - Xianglong Bai, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A 6.78-MHz Wireless Power Transfer System With Inherent Wireless Phase Shift Control Without Feedback Data Sensing Coil. IEEE J. Solid State Circuits 58(6): 1746-1757 (2023) - Mohammadreza Beikmirza, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi:
A Wideband Energy-Efficient Multi-Mode CMOS Digital Transmitter. IEEE J. Solid State Circuits 58(3): 677-690 (2023) - Indranil Bhattacharjee, Gajendranath Chowdary:
A 0.45 mV/V Line Regulation, 0.6 V Output Voltage, Reference-Integrated, Error Amplifier-Less LDO With a 5-Transistor Regulation Core. IEEE J. Solid State Circuits 58(11): 3231-3241 (2023) - Hayden Bialek, Matthew L. Johnston, Arun Natarajan:
A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios. IEEE J. Solid State Circuits 58(12): 3421-3432 (2023) - Sumon Kumar Bose, Arindam Basu:
A 389 TOPS/W, Always ON Region Proposal Integrated Circuit Using In-Memory Computing in 65 nm CMOS. IEEE J. Solid State Circuits 58(2): 554-568 (2023) - Francesco Buccoleri, Simone Mattia Dartizio, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner. IEEE J. Solid State Circuits 58(3): 634-646 (2023) - James F. Buckwalter, Alireza Zolfaghari, Drew A. Hall, Ke-Horng Chen, Dominique Morche:
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 58(12): 3291-3295 (2023) - Alican Çaglar, Steven Van Winckel, Steven Brebels, Piet Wambacq, Jan Craninckx:
Design and Analysis of a 4.2 mW 4 K 6-8 GHz CMOS LNA for Superconducting Qubit Readout. IEEE J. Solid State Circuits 58(6): 1586-1596 (2023) - Guigang Cai, Yan Lu, Rui Paulo Martins:
An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current. IEEE J. Solid State Circuits 58(6): 1758-1768 (2023) - Ji-Soo Chang, Eunsang Jang, Youngkil Choi, Moonkyu Song, Sanghyo Lee, Gi-Jin Kang, Junho Kim, Uijong Song, Chang-Yeon Cho, Giyeong Ko, Hyunseok Hwang, Junseo Lee, Han-Sol Lee, Yong-Il Kwon, Kyungduck Seo, Taeseon Kim, Hyun-Wook Lim, Seongwook Song, Jae-Youl Lee, Sung-Ung Kwak:
A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication. IEEE J. Solid State Circuits 58(1): 155-166 (2023) - Chih-Cheng Chen, Yu-Hsiang Huang, John Carl Joel S. Marquez, Chih-Cheng Hsieh:
A 12-ENOB Second-Order Noise-Shaping SAR ADC With PVT-Insensitive Voltage- Time-Voltage Converter. IEEE J. Solid State Circuits 58(10): 2897-2906 (2023) - Xi Chen, Yizhe Hu, Teerachot Siriburanon, Jianglin Du, Robert Bogdan Staszewski, Anding Zhu:
A 30-GHz Class-F Quadrature DCO Using Phase Shifts Between Drain-Gate-Source for Low Flicker Phase Noise and I/Q Exactness. IEEE J. Solid State Circuits 58(7): 1945-1958 (2023) - Chao Chen, Dan Huang, Yan Zhao, Yuemin Jin, Jun Yang:
An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3. IEEE J. Solid State Circuits 58(7): 1825-1837 (2023) - Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy:
An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS. IEEE J. Solid State Circuits 58(4): 1117-1128 (2023) - Yingping Chen, Bernardo Tacca, Yunzhu Chen, Dwaipayan Biswas, Georges G. E. Gielen, Francky Catthoor, Marian Verhelst, Carolina Mora Lopez:
An Online-Spike-Sorting IC Using Unsupervised Geometry-Aware OSort Clustering for Efficient Embedded Neural-Signal Processing. IEEE J. Solid State Circuits 58(11): 2990-3002 (2023) - Bo-Hao Chen, Tzu-Ying Wu, Kuo-Lin Zheng, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple. IEEE J. Solid State Circuits 58(2): 486-496 (2023) - Min-Yang Chiu, Guan-Cheng Chen, Tzu-Hsiang Hsu, Ren-Shuo Liu, Chung-Chuan Lo, Kea-Tiong Tang, Meng-Fan Chang, Chih-Cheng Hsieh:
A Multimode Vision Sensor With Temporal Contrast Pixel and Column-Parallel Local Binary Pattern Extraction for Dynamic Depth Sensing Using Stereo Vision. IEEE J. Solid State Circuits 58(10): 2767-2777 (2023) - Donghee Cho, Hyungjoo Cho, Sein Oh, Yoontae Jung, Sohmyung Ha, Chul Kim, Minkyu Je:
A High-Efficiency Single-Mode Dual-Path Buck-Boost Converter With Reduced Inductor Current. IEEE J. Solid State Circuits 58(3): 720-731 (2023) - SeongHwan Cho, Joo-Young Kim, Minoru Fujishima, Jun Zhou:
Introduction to the Special Section on the 2022 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 58(10): 2671-2674 (2023) - Dong-Hwi Choi, Dong-Woo Jee:
A 1984-Pixels, 1.26 nW/Pixel Retinal Prosthesis Chip With Time-Domain In-Pixel Image Processing and Bipolar Stimulating Electrode Sharing. IEEE J. Solid State Circuits 58(10): 2757-2766 (2023) - Yoonjae Choi, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Chulwoo Kim:
A 25-Gb/s Single-Ended PAM-4 Receiver With Time-Windowed LSB Decoder for High-Speed Memory Interfaces. IEEE J. Solid State Circuits 58(7): 2005-2015 (2023)
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