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Publication search results
found 19 matches
- 2003
- Massimo Alioto, Rosario Mita, Gaetano Palumbo:
Performance evaluation of the low-voltage CML D-latch topology. Integr. 36(4): 191-209 (2003) - Haytham Azmi, Hamed Elsimary, Mohamed Ibrahim Youssef, Ahmad Safwat:
FPGA based multi-standard configurable FSK demodulator. Integr. 36(3): 145-154 (2003) - Shahar Bar-Or, Guy Even, Yariv Levin:
Generation of representative input vectors for parametric designs: from low precision to high precision. Integr. 36(1-2): 69-82 (2003) - Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín:
1-V quasi constant-gm input/output rail-to-rail CMOS op-amp. Integr. 36(4): 161-174 (2003) - Ramesh Chidambaram, V. Sai Prithvi, Vaidehi V.:
Erratum to "VLSI based fuzzy logic controller enabled adaptive interactive multiple model for target tracking" [Integration 35 (2003) 1-10]. Integr. 36(3): 155 (2003) - Valentina Ciriani, Fabrizio Luccio, Linda Pagli:
Synthesis of integer multipliers in sum of pseudoproducts form. Integr. 36(3): 103-119 (2003) - Francisco V. Fernández:
Analog and mixed-signal IC design and design methodologies. Integr. 36(4): 157-159 (2003) - Oscar Guerra, Carlos M. Domínguez-Matas, Sara Escalera, José M. García-González, Gustavo Liñán, Rocío del Río, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez:
A modem in CMOS technology for data communication on the low-voltage power line. Integr. 36(4): 229-236 (2003) - Ahmad A. Hiasat:
An arithmetic residue to binary conversion technique. Integr. 36(1-2): 13-25 (2003) - Ahmad A. Hiasat, Omar Hasan:
Bit-serial architecture for rank order and stack filters. Integr. 36(1-2): 3-12 (2003) - Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, Chuanjin Richard Shi:
IPRAIL - intellectual property reuse-based analog IC layout automation. Integr. 36(4): 237-262 (2003) - Xianyang Jiang, Xubang Shen, Tianxu Zhang, Huayu Liu:
An improved circuit-partitioning algorithm based on min-cut equivalence relation. Integr. 36(1-2): 55-68 (2003) - Dimitri Kagaris:
On minimum delay clustering without replication. Integr. 36(1-2): 27-39 (2003) - Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei:
Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications. Integr. 36(4): 175-189 (2003) - Patrick J. Quinn, Maxim Pribytko:
Capacitor matching insensitive algorithmic ADC requiring no calibrations. Integr. 36(4): 211-228 (2003) - J. A. Sainz, Antonio Rubio:
Adaptable I/O pad circuit for multiple voltage units bus operation. Integr. 36(1-2): 83-86 (2003) - Sanjay Sharma, Sanjay Attri, R. C. Chauhan:
Low-power VLSI synthesis of DSP systems. Integr. 36(1-2): 41-54 (2003) - Ashok Srivastava, Harish N. Venkata:
Quaternary to binary bit conversion CMOS integrated circuit design using multiple-input floating gate MOSFETS. Integr. 36(3): 87-101 (2003) - Angus Wu, Peter W. M. Tsang, Johnson Tang:
FPGA implementation of a near computation free image compression scheme based on adaptive decimation. Integr. 36(3): 121-143 (2003)
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