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Publication search results
found 115 matches
- 2020
- Xiao Wu, Arun Subramaniyan, Zhehong Wang, Satish Narayanasamy, Reetu Das, David T. Blaauw:
17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing. VLSI Circuits 2020: 1-2 - Ibrahim Ahmed, Po-Wei Chiu, Chris H. Kim:
A Probabilistic Self-Annealing Compute Fabric Based on 560 Hexagonally Coupled Ring Oscillators for Solving Combinatorial Optimization Problems. VLSI Circuits 2020: 1-2 - Ming Ding, Minyoung Song, Evgenii Tiurin, Stefano Traferro, Yao-Hong Liu, Christian Bachmann:
A 0.9pJ/Cycle 8ppm/°C DFLL-Based Wakeup Timer Enabled by a Time-Domain Trimming and An Embedded Temperature Sensing. VLSI Circuits 2020: 1-2 - Zakir Zakir Ahmed, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Christopher Schaef, Nachiket V. Desai, Krishnan Ravichandran, James W. Tschanz, Vivek De:
An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering. VLSI Circuits 2020: 1-2 - Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim:
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. VLSI Circuits 2020: 1-2 - Charles Augustine, Somnath Paul, Turbo Majumder, James W. Tschanz, Muhammad M. Khellah, Vivek De:
2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited Workloads. VLSI Circuits 2020: 1-2 - Christopher L. Ayala, Tomoyuki Tanaka, Ro Saito, Mai Nozoe, Naoki Takeuchi, Nobuyuki Yoshikawa:
MANA: A Monolithic Adiabatic iNtegration Architecture Microprocessor using 1.4zJ/op Superconductor Josephson Junction Devices. VLSI Circuits 2020: 1-2 - Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn:
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications. VLSI Circuits 2020: 1-2 - El Mehdi Boujamaa, Samsudeen Mohamed Ali, Steve Ngueya Wandji, Alexandra Gourio, Suk-Soo Pyo, Gwanhyeob Koh, Yoonjong Song, Taejoong Song, Jongwook Kye, Jean-Christophe Vial, Andrew Sowden, Manuj Rathor, Cyrille Dray:
A 14.7Mb/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference. VLSI Circuits 2020: 1-2 - Ningyuan Cao, Baibhab Chatterjee, Minxiang Gong, Muya Chang, Shreyas Sen, Arijit Raychowdhury:
A 65nm Image Processing SoC Supporting Multiple DNN Models and Real-Time Computation-Communication Trade-Off Via Actor-Critical Neuro-Controller. VLSI Circuits 2020: 1-2 - Pietro Caragiulo, Oscar Elisio Mattia, Amin Arbabian, Boris Murmann:
A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOS. VLSI Circuits 2020: 1-2 - Tengfei Chang, Timothy Claeys, Malisa Vucinic, Xavier Vilajosana, Titan Yuan, Brad Wheeler, Filip Maksimovic, David C. Burnett, Brian Kilberg, Kris Pister, Thomas Watteyne:
Industrial IoT with Crystal-Free Mote-on-Chip. VLSI Circuits 2020: 1-2 - Zhengyu Chen, Sihua Fu, Qiankai Cao, Jie Gu:
A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge Devices. VLSI Circuits 2020: 1-2 - Hsuan-Yu Chen, Wei-Tin Lin, Cheng-Hsiang Liao, Zong-Yi Lin, Zhi-Qiang Zhang, Yu-Yung Kao, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A Domino Bootstrapping 12V GaN Driver for Driving an On-Chip 650V eGaN Power Switch for 96% High Efficiency. VLSI Circuits 2020: 1-2 - Wei-Chih Chen, Chin-Hua Wen, Chin-Ming Fu, Tsung-Hsien Tsai, Yu-Chi Chen, Wen-Hung Huang, Chien-Chun Tsai, Alvin Leng Sun Loke, C. H. Kenny:
A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS. VLSI Circuits 2020: 1-2 - Moon-Chul Choi, Han-Gon Ko, Jonghyun Oh, Hye-Yoon Joo, Kwangho Lee, Deog-Kyoon Jeong:
A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting MM CDR and Adaptive DFE with Single Shared Error Sampler. VLSI Circuits 2020: 1-2 - Mao-Hsuan Chou, Ya-Tin Chang, Tsung-Hsien Tsai, Tsung-Che Lu, Chia-Chun Liao, Hung-Yi Kuo, Ruey-Bin Sheen, Chih-Hsien Chang, Kenny C.-H. Hsieh, Alvin Leng Sun Loke, Mark Chen:
Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOS. VLSI Circuits 2020: 1-2 - Chung-Cheng Chou, Zheng-Jun Lin, Chien-An Lai, Chin-I Su, Pei-Ling Tseng, Wei-Chi Chen, Wu-Chin Tsai, Wen-Ting Chu, Tong-Chern Ong, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang:
A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range. VLSI Circuits 2020: 1-2 - Giorgio Cristiano, Jiawei Liao, Alessandro Novello, Gabriele Atzeni, Taekwang Jang:
A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled Frequency-Locked Loops. VLSI Circuits 2020: 1-2 - Anjana Dissanayake, Henry L. Bishop, Jesse Moody, Henry Muhlbauer, Benton H. Calhoun, Steven M. Bowers:
A Multichannel, MEMS-Less -99dBm 260nW Bit-Level Duty Cycled Wakeup Receiver. VLSI Circuits 2020: 1-2 - Jieqiong Du, Jia Zhou, Chia-Jen Liang, Boyu Hu, Yuan Du, Mau-Chung Frank Chang:
A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface. VLSI Circuits 2020: 1-2 - Efraïm Eland, Shoubhik Karmakar, Burak Gönen, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW. VLSI Circuits 2020: 1-2 - Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2, 200-μm2 Area in 180nm. VLSI Circuits 2020: 1-2 - Benjamin J. Fletcher, Terrence S. T. Mak, Shidhartha Das:
A 3D-Stacked Cortex-M0 SoC with 20.3Gbps/mm2 7.1mW/mm2 Simultaneous Wireless Inter-Tier Data and Power Transfer. VLSI Circuits 2020: 1-2 - Ricardo Gomez Gomez, Edwige Bano, Andreia Cathelin, Sylvain Clerc:
A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. VLSI Circuits 2020: 1-2 - Zheng Guo, Jami Wiedemer, Yusung Kim, Prithvee Sundararajan Ramamoorthy, Prateeksha Bindiganavile Sathyaprasad, Smita Shridharan, Daeyeon Kim, Eric Karl:
A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead. VLSI Circuits 2020: 1-2 - Shourya Gupta, Daniel S. Truesdell, Benton H. Calhoun:
A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes. VLSI Circuits 2020: 1-2 - Sangwook Han, Jaehyuk Jang, Jaeseung Lee, Daechul Jeong, Joonhee Lee, Jongsoo Lee, Chung Lau, Juyoung Han, Sung-Jun Lee, Jeongyeol Bae, Ikkyun Cho, Sang-Yun Lee, Shinwoong Kim, Jae Hoon Lee, Yanghoon Lee, Jaehong Jung, Junho Huh, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang:
An RF Transceiver with Full Digital Interface Supporting 5G New Radio FR1 with 3.84Gbps DL/1.92Gbps UL and Dual-Band GNSS in 14nm FinFET CMOS. VLSI Circuits 2020: 1-2 - Benjamin P. Hershberg, Nereo Markulic, Jorge Lagos, Ewout Martens, Davide Dermit, Jan Craninckx:
A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm. VLSI Circuits 2020: 1-2 - Sungjin Hong, Nan Sun:
A Portable NMR System with 50-kHz IF, 10-us Dead Time, and Frequency Tracking. VLSI Circuits 2020: 1-2
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