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Publication search results
found 63 matches
- 2016
- Johnathan Alsop, Marc S. Orr, Bradford M. Beckmann, David A. Wood:
Lazy release consistency for GPUs. MICRO 2016: 26:1-26:13 - Manoj Alwani, Han Chen, Michael Ferdman, Peter A. Milder:
Fused-layer CNN accelerators. MICRO 2016: 22:1-22:12 - Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger:
A cloud-scale acceleration architecture. MICRO 2016: 7:1-7:13 - Li-Wen Chang, Izzat El Hajj, Christopher I. Rodrigues, Juan Gómez-Luna, Wen-mei W. Hwu:
Efficient kernel synthesis for performance portable programming. MICRO 2016: 12:1-12:13 - Tao Chen, G. Edward Suh:
Efficient data supply for hardware accelerators with prefetching and access/execute decoupling. MICRO 2016: 46:1-46:12 - Renhai Chen, Zili Shao, Tao Li:
Bridging the I/O performance gap for big data workloads: A new NVDIMM-based approach. MICRO 2016: 9:1-9:12 - Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi:
CANDY: Enabling coherent DRAM caches for multi-node systems. MICRO 2016: 35:1-35:13 - Jason Clemons, Chih-Chi Cheng, Iuri Frosio, Daniel R. Johnson, Stephen W. Keckler:
A patch memory system for image processing and computer vision. MICRO 2016: 51:1-51:13 - Alexandros Daglis, Dmitrii Ustiugov, Stanko Novakovic, Edouard Bugnion, Babak Falsafi, Boris Grot:
SABRes: Atomic object reads for in-memory rack-scale computing. MICRO 2016: 6:1-6:13 - Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri:
Dynamic error mitigation in NoCs using intelligent prediction techniques. MICRO 2016: 31:1-31:12 - Ahmed ElTantawy, Tor M. Aamodt:
MIMD synchronization on SIMT architectures. MICRO 2016: 11:1-11:14 - Dmitry Evtyushkin, Dmitry V. Ponomarev, Nael B. Abu-Ghazaleh:
Jump over ASLR: Attacking branch predictors to bypass ASLR. MICRO 2016: 40:1-40:13 - Vaibhav Gogte, Aasheesh Kolli, Michael J. Cafarella, Loris D'Antoni, Thomas F. Wenisch:
HARE: Hardware accelerator for regular expressions. MICRO 2016: 44:1-44:12 - Yonatan Gottesman, Yoav Etsion:
NeSC: Self-virtualizing nested storage controller. MICRO 2016: 10:1-10:12 - Heonjae Ha, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz:
Improving energy efficiency of DRAM by exploiting half page row access. MICRO 2016: 27:1-27:12 - Izzat El Hajj, Juan Gómez-Luna, Cheng Li, Li-Wen Chang, Dejan S. Milojicic, Wen-mei W. Hwu:
KLAP: Kernel launch aggregation and promotion for optimizing dynamic parallelism. MICRO 2016: 13:1-13:12 - Tae Jun Ham, Lisa Wu, Narayanan Sundaram, Nadathur Satish, Margaret Martonosi:
Graphicionado: A high-performance and energy-efficient accelerator for graph analytics. MICRO 2016: 56:1-56:13 - Milad Hashemi, Onur Mutlu, Yale N. Patt:
Continuous runahead: Transparent hardware acceleration for memory intensive workloads. MICRO 2016: 61:1-61:12 - Yang Hu, Tao Li:
Towards efficient server architecture for virtualized network function deployment: Implications and implementations. MICRO 2016: 8:1-8:12 - Cheng-Chieh Huang, Rakesh Kumar, Marco Elver, Boris Grot, Vijay Nagarajan:
C3D: Mitigating the NUMA bottleneck via coherent DRAM caches. MICRO 2016: 36:1-36:12 - Animesh Jain, Parker Hill, Shih-Chieh Lin, Muneeb Khan, Md. Enamul Haque, Michael A. Laurenzano, Scott A. Mahlke, Lingjia Tang, Jason Mars:
Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation. MICRO 2016: 41:1-41:13 - Animesh Jain, Michael A. Laurenzano, Lingjia Tang, Jason Mars:
Continuous shape shifting: Enabling loop co-optimization via near-free dynamic code rewriting. MICRO 2016: 23:1-23:12 - Mark C. Jeffrey, Suvinay Subramanian, Maleen Abeydeera, Joel S. Emer, Daniel Sánchez:
Data-centric execution of speculative parallel programs. MICRO 2016: 5:1-5:13 - Yu Ji, Youhui Zhang, Shuangchen Li, Ping Chi, Cihang Jiang, Peng Qu, Yuan Xie, Wenguang Chen:
NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints. MICRO 2016: 21:1-21:13 - Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang:
Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. MICRO 2016: 14:1-14:12 - Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos:
Stripes: Bit-serial deep neural network computing. MICRO 2016: 19:1-19:12 - Prathmesh Kallurkar, Smruti R. Sarangi:
pTask: A smart prefetching scheme for OS intensive applications. MICRO 2016: 3:1-3:12 - Mikhail Kazdagli, Vijay Janapa Reddi, Mohit Tiwari:
Quantifying and improving the efficiency of hardware-based mobile malware detectors. MICRO 2016: 37:1-37:13 - Gwangsun Kim, Changhyun Kim, Jiyun Jeong, Mike Parker, John Kim:
Contention-based congestion management in large-scale networks. MICRO 2016: 30:1-30:13 - Jinchun Kim, Seth H. Pugsley, Paul V. Gratz, A. L. Narasimha Reddy, Chris Wilkerson, Zeshan Chishti:
Path confidence based lookahead prefetching. MICRO 2016: 60:1-60:12
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