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Publication search results
found 142 matches
- 2009
- Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar:
Power estimation methodology for a high-level synthesis framework. ISQED 2009: 541-546 - Charbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi:
An effective staggered-phase damping technique for suppressing power-gating resonance noise during mode transition. ISQED 2009: 116-119 - Charbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi:
Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks. ISQED 2009: 794-798 - Syed M. Alam, Robert E. Jones, Scott Pozder, Ankur Jain:
Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology. ISQED 2009: 569-575 - Rakesh S. Anigundi, Hongbin Sun, Jian-Qiang Lu, Kenneth Rose, Tong Zhang:
Architecture design exploration of three-dimensional (3D) integrated DRAM. ISQED 2009: 86-90 - Amirali Shayan Arani, Xiang Hu, He Peng, Wenjian Yu, Wanping Zhang, Chung-Kuan Cheng, Mikhail Popovich, Xiaoming Chen, Lew Chua-Eoan, Xiaohua Kong:
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. ISQED 2009: 576-581 - Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan:
Increasing memory yield in future technologies through innovative design. ISQED 2009: 622-626 - Charles Augustine, Arijit Raychowdhury, Yunfei Gao, Mark S. Lundstrom, Kaushik Roy:
PETE: A device/circuit analysis framework for evaluation and comparison of charge based emerging devices. ISQED 2009: 80-85 - Youssef Benabboud, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Laroussi Bouzaida, Isabelle Izaute:
A case study on logic diagnosis for System-on-Chip. ISQED 2009: 253-259 - Maruthi Chandrasekhar Bh, Sudeb Dasgupta:
A 1.2 volt, 90nm, 16-bit three way segmented digital to analog converter (DAC) for low power applications. ISQED 2009: 447-450 - Koustav Bhattacharya, Nagarajan Ranganathan:
A unified gate sizing formulation for optimizing soft error rate, cross-talk noise and power under process variations. ISQED 2009: 388-393 - Stephen Bijansky, Sae Kyu Lee, Adnan Aziz:
TuneLogic: Post-silicon tuning of dual-Vdd designs. ISQED 2009: 394-400 - Ji-Hye Bong, Yong-Jin Kwon, Kyeong-Sik Min, Sung-Mo Kang:
New word-line driving scheme for suppressing oxide-tunneling leakage in sub-65-nm SRAMs. ISQED 2009: 459-464 - Mrinal Bose, Prashant Naphade, Jayanta Bhadra, Hillel Miller:
An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs. ISQED 2009: 377-381 - Kevin Brownell, Ali Durlov Khan, David M. Brooks, Gu-Yeon Wei:
Place and route considerations for voltage interpolated designs. ISQED 2009: 594-600 - Adam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan:
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ISQED 2009: 1-6 - Meng-Syue Chan, Chun-Yao Wang, Yung-Chih Chen:
An efficient approach to sip design integration. ISQED 2009: 241-247 - Anshuman Chandra, Yasunari Kanzawa, Rohit Kapur:
Proactive management of X's in scan chains for compression. ISQED 2009: 260-265 - Hsiu-Ming Chang, Kuan-Yu Lin, Chin-Hsuan Chen, Kwang-Ting Cheng:
A Built-in self-calibration scheme for pipelined ADCs. ISQED 2009: 266-271 - Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Yield evaluation of analog placement with arbitrary capacitor ratio. ISQED 2009: 179-184 - Jone F. Chen, Kuen-Shiuan Tian, Shiang-Yu Chen, Kuo-Ming Wu, C. M. Liu:
Effect of NDD dosage on hot-carrier reliability in DMOS transistors. ISQED 2009: 226-229 - Song Chen, Zheng Xu, Takeshi Yoshimura:
A generalized V-shaped multilevel method for large scale floorplanning. ISQED 2009: 734-739 - Wai Leng Cheong, Brian E. Owens, Hui En Pham, Christopher Hanken, Jim Le, Terri S. Fiez, Kartikeya Mayaram:
Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes. ISQED 2009: 112-115 - Albert Chiang, Wei-Hua Han, Bhanu Kapoor:
Validating physical access layer of WiMAX using SystemVerilog. ISQED 2009: 356-359 - Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura:
Lagrangian relaxation based register placement for high-performance circuits. ISQED 2009: 511-516 - Shu-Hsuan Chou, Chi-Neng Wen, Yan-Ling Liu, Tien-Fu Chen:
VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models. ISQED 2009: 535-540 - Chun-Yu Chuang, Wai-Kei Mak:
Accurate closed-form parameterized block-based statistical timing analysis applying skew-normal distribution. ISQED 2009: 68-73 - Debasish Das, William Scott, Shahin Nazarian, Hai Zhou:
An efficient current-based logic cell model for crosstalk delay analysis. ISQED 2009: 627-633 - Ali Dasdan, Santanu Kolay, Mustafa Yazgan:
Derating for static timing analysis: Theory and practice. ISQED 2009: 719-727 - Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi:
SEU hardened clock regeneration circuits. ISQED 2009: 806-813
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