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Publication search results
found 76 matches
- 1998
- Hoda S. Abdel-Aty-Zohdy:
Artificial Neural Network Electronic Nose for Volatile Organic Compounds. Great Lakes Symposium on VLSI 1998: 122- - Sandeep Agarwal, Fayez El Guibaly:
Modeling of Shift Register-based ATM Switch. Great Lakes Symposium on VLSI 1998: 146-151 - Vishwani D. Agrawal, Sharad C. Seth:
Mutually Disjoint Signals and Probability Calculation in Digital Circuits. Great Lakes Symposium on VLSI 1998: 307-312 - Ahmad S. Al-Mulhem, Alaaeldin Amin, Habib Youssef:
Stochastic Evolution Algorithm For Technology Mapping. Great Lakes Symposium on VLSI 1998: 380-385 - Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. Ayoubi:
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning. Great Lakes Symposium on VLSI 1998: 168- - Massimo Alioto, Gaetano Palumbo:
Novel Simple Models Of Cml Propagation Delay. Great Lakes Symposium on VLSI 1998: 270-274 - Mostafa M. Aref, Khaled M. Elleithy
:
HOOVER: Hardware Object-Oriented Verification. Great Lakes Symposium on VLSI 1998: 351-355 - Tim Bakken, John Choma Jr.:
Stability of a Continuous-Time State Variable Filter with OP-AMP and OTA-C Integrators. Great Lakes Symposium on VLSI 1998: 77-82 - Luca Benini, Giovanni De Micheli, Antonio Lioy
, Enrico Macii, Giuseppe Odasso, Massimo Poncino:
Timed Supersetting and the Synthesis of Telescopic Units. Great Lakes Symposium on VLSI 1998: 331-337 - Luca Benini, Giovanni De Micheli, Alberto Macii
, Enrico Macii, Massimo Poncino:
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. Great Lakes Symposium on VLSI 1998: 8-12 - Mayukh Bhattacharya, Pinaki Mazumder:
Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. Great Lakes Symposium on VLSI 1998: 65-70 - F. S. Bietti, Fabrizio Ferrandi
, Franco Fummi, Donatella Sciuto:
VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection. Great Lakes Symposium on VLSI 1998: 237-242 - Sudhakar Bobba, Ibrahim N. Hajj:
Maximum Current Estimation in Programmable Logic Arrays. Great Lakes Symposium on VLSI 1998: 301-306 - Robert H. Caverly:
Development of a CMOS Cell Library for RF Wireless and Telecommunications Applications. Great Lakes Symposium on VLSI 1998: 258-263 - Arun Chandra, Li-C. Wang, Magdy S. Abadir:
Practical Considerations in Formal Equivalence Checking of PowerPC(tm) Microprocessors. Great Lakes Symposium on VLSI 1998: 362-367 - Gwangwoo Choe, Earl E. Swartzlander Jr.:
Merged Arithmetic for Computing Wavelet Transforms. Great Lakes Symposium on VLSI 1998: 196-201 - Jim E. Crenshaw, Majid Sarrafzadeh:
Low Power Driven Scheduling and Binding. Great Lakes Symposium on VLSI 1998: 406-413 - Karen C. Davis, Satish Venkatesan, Lois M. L. Delcambre:
Sharing Electronic Design Data Via Semantic Spaces. Great Lakes Symposium on VLSI 1998: 432-439 - José G. Delgado-Frias
, Richard Diaz:
A VLSI Self-Compacting Buffer for DAMQ Communication Switches. Great Lakes Symposium on VLSI 1998: 128-133 - José G. Delgado-Frias
, Jabulani Nyathi:
A VLSI High-Performance Encoder with Priority Lookahead. Great Lakes Symposium on VLSI 1998: 59-64 - Travis E. Doom, Jennifer L. White, Anthony S. Wojcik, Gregory H. Chisholm:
Identifying High-Level Components in Combinational Circuits. Great Lakes Symposium on VLSI 1998: 313-318 - Hassan O. Elwan, Mohammed Ismail:
Low Voltage Low power CMOS AGC circuit for wireless communication. Great Lakes Symposium on VLSI 1998: 281-285 - Amr M. Fahim, Muhammad M. Khellah, Mohamed I. Elmasry:
A Low-Power High-Performance Embedded SRAM Macrocell. Great Lakes Symposium on VLSI 1998: 13-17 - Mark A. Franklin, Prithvi Prabhu:
Performance Optimization of Self-Timed Circuits. Great Lakes Symposium on VLSI 1998: 374-379 - S. Gailhard, Nathalie Julien, Jean-Philippe Diguet, Eric Martin:
How to Transform an Architectural Synthesis Tool for Low Power VLSI Designs. Great Lakes Symposium on VLSI 1998: 426- - Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo, C. Strano:
A Novel 1.5-V Cmos Mixer. Great Lakes Symposium on VLSI 1998: 113-117 - Wilsin Gosti, Alberto L. Sangiovanni-Vincentelli, Tiziano Villa, Alexander Saldanha:
An Exact Input Encoding Algorithm for BDDs Representing FSMs. Great Lakes Symposium on VLSI 1998: 294-300 - Wolfgang Günther, Rolf Drechsler:
Linear Transformations and Exact Minimization of BDDs. Great Lakes Symposium on VLSI 1998: 325-330 - Adger E. Harvin III, José G. Delgado-Frias
:
A Dictionary Machine Emulation on a VLSI Computing Tree System. Great Lakes Symposium on VLSI 1998: 134-139 - David Hertweck, Mihaela Nica, Sang-Eon Park, Carla N. Purdy:
Standard Data Representations for VLSI Algorithm Development. Great Lakes Symposium on VLSI 1998: 446-451
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