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Publication search results
found 31 matches
- 2018
- Amila Akagic
, Emir Buza
, Razija Turcinhodzic, Hana Haseljic, Hiroyuki Noda, Hideharu Amano:
Superpixel Accelerator for Computer Vision Applications on Arria 10 SoC. DDECS 2018: 55-60 - Daniel Arbet
, Martin Kovác
, Lukás Nagy
, Viera Stopjaková
, Michal Sovcik:
Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS 2018: 45-50 - Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito
, Behrad Niazmand
, Massimo Violante, Jaan Raik
, Maksim Jenihhin
:
QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. DDECS 2018: 67-72 - Siavoosh Payandeh Azad, Adeboye Stephen Oyeniran
, Raimund Ubar
:
Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells. DDECS 2018: 21-26 - Riccardo Cantoro
, Luigi San Paolo, Matteo Sonza Reorda
, Giovanni Squillero:
An Evolutionary Technique for Reducing the Duration of Reconfigurable Scan Network Test. DDECS 2018: 129-134 - Giulio D'Amato
, Giovanni Piccinni
, Gianfranco Avitabile
, Giuseppe Coviello
, Claudio Talarico:
An Integrated Phase Shifting Frequency Synthesizer for Active Electronically Scanned Arrays. DDECS 2018: 91-94 - Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler
, Mehdi Dehbashi, Ulrike Pfannkuchen:
Constraint-Based Pattern Retargeting for Reducing Localized Power Activity During Testing. DDECS 2018: 79-84 - Milan R. Dincic, Zoran H. Peric
, Dragan B. Denic, Zoran Stamenkovic
:
Design of Low-Bit Robust Analog-to-Digital Converters for Signals with Gaussian Distribution. DDECS 2018: 123-128 - Sara Divanbeigi, Felix Winkler, Martin Bergen, Markus Olbrich:
Modeling and Accelerated Mixed-Signal Simulation of a Control System. DDECS 2018: 95-100 - Hassan Ebrahimi, Hans G. Kerkhoff:
Intermittent Resistance Fault Detection at Board Level. DDECS 2018: 135-140 - Seyed Hamid Fani, Ali Peiravi, Hooman Farkhani, Farshad Moradi
:
A Novel TFET 8T-SRAM Cell with Improved Noise Margin and Stability. DDECS 2018: 39-44 - Omar Farag, Mariam Mohamed, Mohamed A. Abd El-Ghany
, Klaus Hofmann:
Integrated Sensors for Early Breast Cancer Diagnostics. DDECS 2018: 153-157 - Umberto Ferrandino, Marcello Traiola
, Mario Barbareschi
, Antonino Mazzeo, Petr Fiser, Alberto Bosio:
Synthesis of Finite State Machines on Memristor Crossbars. DDECS 2018: 107-112 - Theodor Hillebrand, Ludwig Karsthof, Steffen Paul, Dagmar Peters-Drolshagen:
Reliability-Aware Multi-Vth Domain Digital Design Assessment. DDECS 2018: 1-4 - Florian Huemer
, Thomas Polzer, Andreas Steininger
:
Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA. DDECS 2018: 141-146 - Karl Janson
, Carl Johann Treudler, Thomas Hollstein
, Jaan Raik
, Maksim Jenihhin
, Görschwin Fey
:
Software-Level TMR Approach for On-Board Data Processing in Space Applications. DDECS 2018: 147-152 - Lukás Kohútka
, Viera Stopjaková
:
Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. DDECS 2018: 5-8 - Kai Lehniger, Stefan Weidling, Mario Schölzel:
Heuristic for Page-Based Incremental Reprogramming of Wireless Sensor Nodes. DDECS 2018: 61-66 - David Lemma, Daniel Große
, Rolf Drechsler
:
Natural Language Based Power Domain Partitioning. DDECS 2018: 101-106 - Yuanqing Li, Anselm Breitenreiter, Marko S. Andjelkovic
, Oliver Schrape, Milos Krstic
:
Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle. DDECS 2018: 9-14 - Dominik Macko
:
Contribution to Automated Generating of System Power-Management Specification. DDECS 2018: 27-32 - Navaneetha Channiganathota Manjappa
, Anselm Breitenreiter, Markus Ulbricht, Milos Krstic
:
A Methodology to Verify Digital IP's within Mixed-Signal Systems. DDECS 2018: 162-165 - Lukás Nagy
, Daniel Arbet
, Martin Kovác
, Miroslav Potocný, Viera Stopjaková
:
Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS 2018: 51-54 - Ondreg Novak:
Nonlinear Binary Codes and Their Utilization for Test. DDECS 2018: 15-20 - Izel Cagin Odabasi, Mustafa Berke Yelten, Engin Afacan, I. Faik Baskaya, Ali Emre Pusane, Günhan Dündar
:
A Rare Event Based Yield Estimation Methodology for Analog Circuits. DDECS 2018: 33-38 - Miroslav Potocný, Viera Stopjaková
, Martin Kovác
:
Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. DDECS 2018: 158-161 - Szymon Reszewicz, Krzysztof Siwiec
, Witold A. Pleskacz:
2.4 GHz LC-VCO with Improved Robustness against PVT Using FD-SOI Body Biasing Technique. DDECS 2018: 113-116 - Alexander Sprenger
, Sybille Hellebrand:
Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. DDECS 2018: 73-78 - Abraham Temesgen Tibebu, Görschwin Fey
:
Augmenting All Solution SAT Solving for Circuits with Structural Information. DDECS 2018: 117-122 - Marcello Traiola
, Arnaud Virazel
, Patrick Girard
, Mario Barbareschi
, Alberto Bosio:
On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. DDECS 2018: 85-90
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