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Publication search results
found 62 matches
- 2012
- Hsu-Hung Chiang, Huang-Jia Cheng, Yuan-Shin Hwang:
Doubling the number of registers on ARM processors. Interaction between Compilers and Computer Architectures 2012: 1-8 - Min Feng, Chen Tian, Rajiv Gupta:
Enhancing LRU replacement via phantom associativity. Interaction between Compilers and Computer Architectures 2012: 9-16 - Marianne J. Jantz, Prasad A. Kulkarni:
Understand and categorize dynamically dead instructions for contemporary architectures. Interaction between Compilers and Computer Architectures 2012: 25-32 - Changmin Lee, Won Woo Ro, Jean-Luc Gaudiot:
Cooperative heterogeneous computing for parallel processing on CPU/GPU hybrids. Interaction between Compilers and Computer Architectures 2012: 33-40 - Qing'an Li, Yingchao Zhao, Jingtong Hu, Chun Jason Xue, Edwin Hsing-Mean Sha, Yanxiang He:
MGC: Multiple graph-coloring for non-volatile memory based hybrid Scratchpad Memory. Interaction between Compilers and Computer Architectures 2012: 17-24 - Raphael Poss, Clemens Grelck, Stephan Herhut, Sven-Bodo Scholz:
Lazy reference counting for the microgrid. Interaction between Compilers and Computer Architectures 2012: 41-48 - 16th Workshop on Interaction between Compilers and Computer Architectures, INTERACT 2012, New Orleans, LA, USA, February 25, 2012. IEEE Computer Society 2012, ISBN 978-1-4673-2613-1 [contents]
- 2011
- Mirza Omer Beg, Peter van Beek:
A Constraint Programming Approach for Instruction Assignment. Interaction between Compilers and Computer Architectures 2011: 25-34 - Abhishek Deb, Josep M. Codina, Antonio González:
A Co-designed HW/SW Approach to General Purpose Program Acceleration Using a Programmable Functional Unit. Interaction between Compilers and Computer Architectures 2011: 1-8 - Ian Finlayson, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
Improving Low Power Processor Efficiency with Static Pipelining. Interaction between Compilers and Computer Architectures 2011: 17-24 - Nicholas Hunt, Paramjit Singh Sandhu, Luis Ceze:
Characterizing the Performance and Energy Efficiency of Lock-Free Data Structures. Interaction between Compilers and Computer Architectures 2011: 63-70 - Prasad A. Kulkarni, Jay Fuller:
JIT Compilation Policy on Single-Core and Multi-core Machines. Interaction between Compilers and Computer Architectures 2011: 54-62 - Junpyo Lee, Jae-Jin Kim, Soo-Mook Moon, Suhyun Kim:
Aggressive Function Splitting for Partial Inlining. Interaction between Compilers and Computer Architectures 2011: 80-86 - Bertrand A. Maher, Katherine E. Coons, Kathryn S. McKinley, Doug Burger:
The Good Block: Hardware/Software Design for Composable, Block-Atomic Processors. Interaction between Compilers and Computer Architectures 2011: 9-16 - Archana Ravindar, Y. N. Srikant:
Implications of Program Phase Behavior on Timing Analysis. Interaction between Compilers and Computer Architectures 2011: 71-79 - Chun-Yu Shei, Adarsh Yoga, Madhav Ramesh, Arun Chauhan:
MATLAB Parallelization through Scalarization. Interaction between Compilers and Computer Architectures 2011: 44-53 - Yu Sun, Wei Zhang:
On-Line Trace Based Automatic Parallelization of Java Programs on Multicore Platforms. Interaction between Compilers and Computer Architectures 2011: 35-43 - 15th Workshop on Interaction between Compilers and Computer Architectures, INTERACT 2011, San Antonio, Texas, USA, February 12, 2011. IEEE Computer Society 2011, ISBN 978-0-7695-4441-0 [contents]
- 2005
- Evangelia Athanasaki, Nectarios Koziris, Panayotis Tsanakas:
A tile size selection analysis for blocked array layouts. Interaction between Compilers and Computer Architectures 2005: 70-80 - Kaiyu Chen, Sun Chan, Roy Dz-Ching Ju, Peng Tu:
Optimizing structures in object oriented programs. Interaction between Compilers and Computer Architectures 2005: 94-103 - Simon Kågström, Håkan Grahn, Lars Lundberg:
Automatic low overhead program instrumentation with the LOPI framework. Interaction between Compilers and Computer Architectures 2005: 82-93 - Keiji Kimura, Yasutaka Wada, Hirofumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara:
Multigrain parallel processing on compiler cooperative chip multiprocessor. Interaction between Compilers and Computer Architectures 2005: 11-20 - Markus Mock, Ricardo Villamarín-Salomón, José Baiocchi:
An empirical study of data speculation use on the Intel Itanium 2 processor. Interaction between Compilers and Computer Architectures 2005: 22-33 - Carlos Molina, Antonio González, Jordi Tubella:
Compiler analysis for trace-level speculative multithreaded architectures. Interaction between Compilers and Computer Architectures 2005: 2-10 - Jennifer B. Sartor, Subramaniam Venkiteswaran, Kathryn S. McKinley, Zhenlin Wang:
Cooperative caching with keep-me and evict-me. Interaction between Compilers and Computer Architectures 2005: 46-57 - Alex Shye, Matthew Iyer, Tipp Moseley, David Hodgdon, Dan Fay, Vijay Janapa Reddi, Daniel A. Connors:
Analysis of path profiling information generated with performance monitoring hardware. Interaction between Compilers and Computer Architectures 2005: 34-43 - Mohamed M. Zahran, Anasua Bhowmik:
Hybrid compiler and microarchitecture technique for cache traffic optimization. Interaction between Compilers and Computer Architectures 2005: 58-69 - 9th Annual Workshop on Interaction between Compilers and Computer Architectures, INTERACT-9 2005, San Francisco, California, USA, February 13, 2005. IEEE Computer Society 2005, ISBN 0-7695-2321-8 [contents]
- 2004
- Evangelia Athanasaki, Nectarios Koziris:
Fast Indexing for Blocked Array Layouts to Improve Multi-Level Cache Locality. Interaction between Compilers and Computer Architectures 2004: 109-119 - Ravi V. Batchu, Daniel A. Jiménez:
Exploiting Procedure Level Locality to Reduce Instruction Cache Misses. Interaction between Compilers and Computer Architectures 2004: 75-84
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