- Katsuya Kikuchi, Fumiki Kato, Shunsuke Nemoto, Hiroshi Nakagawa, Masahiro Aoyagi, Youtaro Yasu, Kohji Koshiji:
Investigation of optimized high-density flip-chip interconnect design including micro Au bumps for 3-D stacked LSI packaging. 3DIC 2013: 1-4 - Heegon Kim, Jonghyun Cho, Jonghoon J. Kim, Daniel H. Jung, Sumin Choi, Joungho Kim, Junho Lee, Kunwoo Park:
Eye-diagram simulation and analysis of a high-speed TSV-based channel. 3DIC 2013: 1-7 - Jonghoon J. Kim, Heegon Kim, Sukjin Kim, Bumhee Bae, Daniel H. Jung, Sunkyu Kong, Joungho Kim, Junho Lee, Kunwoo Park:
Non-contact wafer-level TSV connectivity test methodology using magnetic coupling. 3DIC 2013: 1-4 - Kouji Kiyoyama, Y. Sato, Hiroyuki Hashimoto, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi:
A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor. 3DIC 2013: 1-4 - Sayuri Kohara, Akihiro Horibe, Kuniaki Sueoka, Keiji Matsumoto, Fumiaki Yamada, Hiroyuki Mori, Yasumitsu Orii:
Thermo-mechanical evaluation of 3D packages. 3DIC 2013: 1-4 - Yann Lamy, Jean-Philippe Colonna, G. Simon, Patrick Leduc, Séverine Cheramy, C. Laviron:
Which interconnects for which 3D applications? Status and perspectives. 3DIC 2013: 1-6 - Y. Lamy, Laurent Dussopt, Ossama El Bouayadi, C. Ferrandon, Alexandre Siligaris, Cedric Dehos, Pierre Vincent:
A compact 3D silicon interposer package with integrated antenna for 60GHz wireless applications. 3DIC 2013: 1-6 - Jae Hak Lee, Hyoung Joon Kim, Jun-Yeob Song, Chang Woo Lee, Tae Ho Ha:
A study on wafer level TSV build-up integration method. 3DIC 2013: 1-4 - Kang Wook Lee, Seiya Tanikawa, Mariappan Murugesan, H. Naganuma, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi:
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. 3DIC 2013: 1-4 - Hong-Yeol Lim, Min-Kwan Kee, Gi-Ho Park:
Phase detection based data prefetching for utilizing memory bandwidth of 3D integrated circuits. 3DIC 2013: 1-5 - Julia Hsin-Lin Lu, Wing-Fai Loke, Dimitrios Peroulis, Byunghoo Jung:
Implementing wireless communication links in 3-D ICs utilizing wide-band on-chip meandering microbump antenna. 3DIC 2013: 1-5 - Tiantao Lu, Ankur Srivastava:
Detailed electrical and reliability study of tapered TSVs. 3DIC 2013: 1-7 - Matthew Lueck, Chris W. Gregory, Dean Malta, Alan Huffman, John M. Lannon, Dorota Temple:
High density interconnect bonding of heterogeneous materials using non-collapsible microbumps at 10 μm pitch. 3DIC 2013: 1-5 - Yassir Madhour, Michael Zervas, Gerd Schlottig, Thomas Brunschwiler, Yusuf Leblebici, John Richard Thome, Bruno Michel:
Integration of intra chip stack fluidic cooling using thin-layer solder bonding. 3DIC 2013: 1-8 - Keiji Matsumoto, Soichiro Ibaraki, Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi, Hiroyuki Mori, Yasumitsu Orii, Fumiaki Yamada, Kohei Fujihara, Junichi Takamatsu, Koji Kondo:
Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack. 3DIC 2013: 1-8 - Laura B. Mauer, John Taddei, Elena Lawrence, Ramey Youssef, Stephen P. Olson:
Silicon Etch with integrated metrology for through silicon via (TSV) reveal. 3DIC 2013: 1-4 - Kentaro Mori, Yoshihiro Ono, Shinji Watanabe, Toshikazu Ishikawa, Michiaki Sugiyama, Satoshi Imasu, Toshihiko Ochiai, Ryo Mori, Tsuyoshi Kida, Tomoaki Hashimoto, Hideki Tanaka, Michitaka Kimura:
High density and reliable packaging technology with Non Conductive Film for 3D/TSV. 3DIC 2013: 1-7 - Mariappan Murugesan, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi, Yuji Sutou, H. Wang, J. Koike:
Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. 3DIC 2013: 1-4 - Tadao Nakamura, Yoriko Mizushima, Hideki Kitada, Young-Suk Kim, Nobuhide Maeda, Shoichi Kodama, Ryuichi Sugie, Hiroshi Hashimoto, Akihito Kawai, Kazuhisa Arai, Akira Uedono, Takayuki Ohba:
Influence of wafer thinning process on backside damage in 3D integration. 3DIC 2013: 1-6 - S. Nishizawa, Ryohei Arima, Tomohiro Shimizu, Shoso Shingubara, Fumihiro Inoue:
Highly conformal and adhesive electroless barrier and Cu seed formation using nanoparticle catalyst for realizing a high aspect ratio cu-filled TSV. 3DIC 2013: 1-4 - Osamu Nukaga, Tatsuya Shioiri, Satoshi Yamamoto, Tatsuo Suemasu:
Glass interposer with high-density three-dimensional structured TGV for 3D system integration. 3DIC 2013: 1-4 - Zvi Or-Bach:
The monolithic 3D advantage: Monolithic 3D is far more than just an alternative to 0.7x scaling. 3DIC 2013: 1-7 - Stephen H. Pan, Norman Chang, Tadaaki Hitomi:
3D-IC dynamic thermal analysis with hierarchical and configurable chip thermal model. 3DIC 2013: 1-8 - Vinod Pangracious, Habib Mehrez, Zied Marrakchi:
Designing a 3D tree-based FPGA: Optimization of butterfly programmable interconnect topology using 3D technology. 3DIC 2013: 1-8 - Shreepad Panth, Kambiz Samadi, Sung Kyu Lim:
Test-TSV estimation during 3D-IC partitioning. 3DIC 2013: 1-7 - Manjari Pradhan, Chandan Giri, Hafizur Rahaman, Debesh K. Das:
Optimal stacking of SOCs in a 3D-SIC for post-bond testing. 3DIC 2013: 1-5 - Rene Puschmann, Mathias Bottcher, Irene Bartusseck, Frank Windrich, Conny Fiedler, Peggy John, Charles Alix Manier, Kai Zoschke, Jurgen Grafe, Hermann Oppermann, Jürgen Wolf, K. Dieter Lang, Michael Ziesmann:
3D integration of standard integrated circuits. 3DIC 2013: 1-7 - James Quinn, Barbara Loferer:
Quality in 3D assembly - Is "Known Good Die" good enough? 3DIC 2013: 1-5 - Artur Quiring, Markus Olbrich, Erich Barke:
Improving 3D-Floorplanning using smart selection operations in meta-heuristic optimization. 3DIC 2013: 1-6 - Bipin Rajendran, Albert K. Henning, Brian Cronquist, Zvi Or-Bach:
Pulsed laser annealing: A scalable and practical technology for monolithic 3D IC. 3DIC 2013: 1-5