• 
  Miguel Lino Silva, João Canas Ferreira:
  Creation of Partial FPGA Configurations at Run-Time. DSD 2010: 80-87
• 
  Antonio da Silva, Sebastián Sánchez:
  LEON3 ViP: A Virtual Platform with Fault Injection Capabilities. DSD 2010: 813-816
• 
  Marta Stepniewska, Adam Luczak, Jakub Siast:
  Network-on-Multi-Chip (NoMC) for Multi-FPGA Multimedia Systems. DSD 2010: 475-481
• 
  Martin Straka, Jan Kastil, Zdenek Kotásek:
  Fault Tolerant Structure for SRAM-Based FPGA via Partial Dynamic Reconfiguration. DSD 2010: 365-372
• 
  Sander Stuijk, Marc Geilen, Twan Basten:
  A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour. DSD 2010: 548-555
• 
  Pedro Suárez-Casal, Angel Carro-Lagoa, José Antonio García-Naya, Luis Castedo:
  A Multicore SDR Architecture for Reconfigurable WiMAX Downlink. DSD 2010: 801-804
• 
  Makoto Sugihara:
  Dynamic Control Flow Checking Technique for Reliable Microprocessors. DSD 2010: 232-239
• 
  Toktam Taghavi, Andy D. Pimentel:
  Visualization of Multi-objective Design Space Exploration for Embedded Systems. DSD 2010: 11-20
• 
  Masaru Takesue:
  A Class of Recursive Networks on a Chip for Enhancing Intercluster Parallelism. DSD 2010: 389-392
• 
  Somsubhra Talapatra, Hafizur Rahaman, Samir K. Saha:
  Unified Digit Serial Systolic Montgomery Multiplication Architecture for Special Classes of Polynomials over GF(2m). DSD 2010: 427-432
• 
  Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana:
  Description-Level Optimisation of Synthesisable Asynchronous Circuits. DSD 2010: 441-448
• 
  J. F. Tarillo, Nikolaos Mavrogiannakis, Carlos Arthur Lang Lisbôa, Costas Argyrides, Luigi Carro:
  Multiple Bit Error Detection and Correction in Memory. DSD 2010: 652-657
• 
  Ozgur Tasdizen, Ilker Hamzaoglu:
  Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation. DSD 2010: 731-736
• 
  Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides:
  Customizable Composition and Parameterization of Hardware Design Transformations. DSD 2010: 595-602
• 
  Alice M. Tokarnia, Marina Tachibana:
  Design of Trace-Based Split Array Caches for Embedded Applications. DSD 2010: 21-27
• 
  Lara G. Villanueva, Gustavo Marrero Callicó, Félix Tobajas, Sebastián López, Valentin de Armas, José Francisco López, Roberto Sarmiento:
  Medical Diagnosis Improvement Through Image Quality Enhancement Based on Super-Resolution. DSD 2010: 259-262
• 
  Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu:
  Software Programmable Data Allocation in Multi-bank Memory of SIMD Processors. DSD 2010: 28-33
• 
  Yun Jie Wu, Dominique Houzet, Sylvain Huet:
  A Programming Model and a NoC-Based Architecture for Streaming Applications. DSD 2010: 393-397
• 
  Bin Wu, Guido Masera:
  A Novel VLSI Architecture of Fixed-Complexity Sphere Decoder. DSD 2010: 737-744
• 
  Tingcong Ye, Dilip P. Vasudevan, Jiaoyan Chen, Emanuel M. Popovici, Michel P. Schellekens:
  Static Average Case Power Estimation Technique for Block Ciphers. DSD 2010: 689-696
• 
  Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen:
  On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism. DSD 2010: 531-537
• 
  Sebastián López:
  13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2010, 1-3 September 2010, Lille, France. IEEE Computer Society 2010, ISBN 978-0-7695-4171-6 [contents]

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