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@inproceedings{DBLP:conf/ipps/LakshmikanthanGSV00,
  author       = {Preetham Lakshmikanthan and
                  Sriram Govindarajan and
                  Vinoo Srinivasan and
                  Ranga Vemuri},
  editor       = {Jos{\'{e}} D. P. Rolim},
  title        = {Behavioral Partitioning with Synthesis for Multi-FPGA Architectures
                  under Interconnect, Area, and Latency Constraints},
  booktitle    = {Parallel and Distributed Processing, 15 {IPDPS} 2000 Workshops, Cancun,
                  Mexico, May 1-5, 2000, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {1800},
  pages        = {924--931},
  publisher    = {Springer},
  year         = {2000},
  url          = {https://doi.org/10.1007/3-540-45591-4\_127},
  doi          = {10.1007/3-540-45591-4\_127},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ipps/LakshmikanthanGSV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/GovindarajanSLV00,
  author       = {Sriram Govindarajan and
                  Vinoo Srinivasan and
                  Preetham Lakshmikanthan and
                  Ranga Vemuri},
  title        = {A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning
                  for Multi-Device Architectures},
  booktitle    = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
                  4-7 January 2000, Calcutta, India},
  pages        = {212--219},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ICVD.2000.812611},
  doi          = {10.1109/ICVD.2000.812611},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/GovindarajanSLV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fccm/SrinivasanV99,
  author       = {Vinoo Srinivasan and
                  Ranga Vemuri},
  title        = {Task-Level Partitioning and {RTL} Design Space Exploration for Multi-FPGA
                  Architectures},
  booktitle    = {7th {IEEE} Symposium on Field-Programmable Custom Computing Machines
                  {(FCCM} '99), 21-23 April 1999, Napa, CA, {USA}},
  pages        = {272},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/FPGA.1999.803694},
  doi          = {10.1109/FPGA.1999.803694},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/SrinivasanV99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SrinivasanV99,
  author       = {Vinoo Srinivasan and
                  Ranga Vemuri},
  editor       = {Sinan Kaptanoglu and
                  Steve Trimberger},
  title        = {Throughput Optimization with Design Space Exploration During Partitioning
                  for Multi-FPGA Architectures},
  booktitle    = {Proceedings of the 1999 {ACM/SIGDA} Seventh International Symposium
                  on Field Programmable Gate Arrays, {FPGA} 1999, Monterey, CA, USA,
                  February 21-23, 1999},
  pages        = {253},
  publisher    = {{ACM}},
  year         = {1999},
  url          = {https://doi.org/10.1145/296399.296527},
  doi          = {10.1145/296399.296527},
  timestamp    = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SrinivasanV99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/SrinivasanRVW99,
  author       = {Vinoo Srinivasan and
                  Shankar Radhakrishnan and
                  Ranga Vemuri and
                  Jeffrey Walrath},
  editor       = {Jos{\'{e}} D. P. Rolim and
                  Frank Mueller and
                  Albert Y. Zomaya and
                  Fikret Er{\c{c}}al and
                  Stephan Olariu and
                  Binoy Ravindran and
                  Jan Gustafsson and
                  Hiroaki Takada and
                  Ronald A. Olsson and
                  Laxmikant V. Kal{\'{e}} and
                  Peter H. Beckman and
                  Matthew Haines and
                  Hossam A. ElGindy and
                  Denis Caromel and
                  Serge Chaumette and
                  Geoffrey C. Fox and
                  Yi Pan and
                  Keqin Li and
                  Tao Yang and
                  G. Ghiola and
                  Gianni Conte and
                  Luigi V. Mancini and
                  Dominique M{\'{e}}ry and
                  Beverly A. Sanders and
                  Devesh Bhatt and
                  Viktor K. Prasanna},
  title        = {Interconnect Synthesis for Reconfigurable Multi-FPGA Architectures},
  booktitle    = {Parallel and Distributed Processing, 11 IPPS/SPDP'99 Workshops Held
                  in Conjunction with the 13th International Parallel Processing Symposium
                  and 10th Symposium on Parallel and Distributed Processing, San Juan,
                  Puerto Rico, USA, April 12-16, 1999, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {1586},
  pages        = {588--596},
  publisher    = {Springer},
  year         = {1999},
  url          = {https://doi.org/10.1007/BFb0097943},
  doi          = {10.1007/BFB0097943},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ipps/SrinivasanRVW99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/SrinivasanRV98,
  author       = {Vinoo Srinivasan and
                  Shankar Radhakrishnan and
                  Ranga Vemuri},
  editor       = {Patrick M. Dewilde and
                  Franz J. Rammig and
                  Gerry Musgrave},
  title        = {Hardware Software Partitioning with Integrated Hardware Design Space
                  Exploration},
  booktitle    = {1998 Design, Automation and Test in Europe {(DATE} '98), February
                  23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
  pages        = {28--35},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/DATE.1998.655833},
  doi          = {10.1109/DATE.1998.655833},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/SrinivasanRV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fccm/GovindarajanOKSV98,
  author       = {Sriram Govindarajan and
                  Iyad Ouaiss and
                  Meenakshi Kaul and
                  Vinoo Srinivasan and
                  Ranga Vemuri},
  title        = {An Effective Design System for Dynamically Reconfigurable Architectures},
  booktitle    = {6th {IEEE} Symposium on Field-Programmable Custom Computing Machines
                  {(FCCM} '98), 15-17 April 1998, Napa Valley, CA, {USA}},
  pages        = {312--313},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/FPGA.1998.707932},
  doi          = {10.1109/FPGA.1998.707932},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/GovindarajanOKSV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/OuaissGSKV98,
  author       = {Iyad Ouaiss and
                  Sriram Govindarajan and
                  Vinoo Srinivasan and
                  Meenakshi Kaul and
                  Ranga Vemuri},
  editor       = {Jos{\'{e}} D. P. Rolim},
  title        = {An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable
                  Multi-FPGA Architectures},
  booktitle    = {Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held
                  in Conjunction with the 12th International Parallel Processing Symposium
                  and 9th Symposium on Parallel and Distributed Processing, Orlando,
                  Florida, USA, March 30 - April 3, 1998, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {1388},
  pages        = {31--36},
  publisher    = {Springer},
  year         = {1998},
  url          = {https://doi.org/10.1007/3-540-64359-1\_669},
  doi          = {10.1007/3-540-64359-1\_669},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ipps/OuaissGSKV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/SrinivasanV98,
  author       = {Vinoo Srinivasan and
                  Ranga Vemuri},
  title        = {A Retiming Based Relaxation Heuristic for Resource-Constrained Loop
                  Pipelining},
  booktitle    = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
                  4-7 January 1998, Chennai, India},
  pages        = {435--441},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ICVD.1998.646646},
  doi          = {10.1109/ICVD.1998.646646},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/SrinivasanV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asap/NarasimhanSVWGV96,
  author       = {Naren Narasimhan and
                  Vinoo Srinivasan and
                  Madhavi Vootukuru and
                  Jeffrey Walrath and
                  Sriram Govindarajan and
                  Ranga Vemuri},
  title        = {Rapid Prototyping of Reconfigurable Coprocessors},
  booktitle    = {1996 International Conference on Application-Specific Systems, Architectures,
                  and Processors {(ASAP} '96), August 19-23, 1996, Chicago, {IL} , {USA}},
  pages        = {303--312},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ASAP.1996.542825},
  doi          = {10.1109/ASAP.1996.542825},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asap/NarasimhanSVWGV96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/eurodac/SrinivasanKV96,
  author       = {Vinoo Srinivasan and
                  Nand Kumar and
                  Ranga Vemuri},
  editor       = {Graham Symonds and
                  Wolfgang Nebel},
  title        = {Hierarchical behavioral partitioning for multicomponent synthesis},
  booktitle    = {Proceedings of the conference on European design automation, {EURO-DAC}
                  '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996},
  pages        = {212--217},
  publisher    = {{IEEE} Computer Society Press},
  year         = {1996},
  url          = {https://doi.org/10.1109/EURDAC.1996.558207},
  doi          = {10.1109/EURDAC.1996.558207},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/eurodac/SrinivasanKV96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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