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@inproceedings{DBLP:conf/ipps/LakshmikanthanGSV00, author = {Preetham Lakshmikanthan and Sriram Govindarajan and Vinoo Srinivasan and Ranga Vemuri}, title = {Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints}, booktitle = {{IPDPS} Workshops}, series = {Lecture Notes in Computer Science}, volume = {1800}, pages = {924--931}, publisher = {Springer}, year = {2000} }
@inproceedings{DBLP:conf/vlsid/GovindarajanSLV00, author = {Sriram Govindarajan and Vinoo Srinivasan and Preetham Lakshmikanthan and Ranga Vemuri}, title = {A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures}, booktitle = {{VLSI} Design}, pages = {212--219}, publisher = {{IEEE} Computer Society}, year = {2000} }
@inproceedings{DBLP:conf/fccm/SrinivasanV99, author = {Vinoo Srinivasan and Ranga Vemuri}, title = {Task-Level Partitioning and {RTL} Design Space Exploration for Multi-FPGA Architectures}, booktitle = {{FCCM}}, pages = {272}, publisher = {{IEEE} Computer Society}, year = {1999} }
@inproceedings{DBLP:conf/fpga/SrinivasanV99, author = {Vinoo Srinivasan and Ranga Vemuri}, title = {Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures}, booktitle = {{FPGA}}, pages = {253}, publisher = {{ACM}}, year = {1999} }
@inproceedings{DBLP:conf/ipps/SrinivasanRVW99, author = {Vinoo Srinivasan and Shankar Radhakrishnan and Ranga Vemuri and Jeffrey Walrath}, title = {Interconnect Synthesis for Reconfigurable Multi-FPGA Architectures}, booktitle = {{IPPS/SPDP} Workshops}, series = {Lecture Notes in Computer Science}, volume = {1586}, pages = {588--596}, publisher = {Springer}, year = {1999} }
@inproceedings{DBLP:conf/date/SrinivasanRV98, author = {Vinoo Srinivasan and Shankar Radhakrishnan and Ranga Vemuri}, title = {Hardware Software Partitioning with Integrated Hardware Design Space Exploration}, booktitle = {{DATE}}, pages = {28--35}, publisher = {{IEEE} Computer Society}, year = {1998} }
@inproceedings{DBLP:conf/fccm/GovindarajanOKSV98, author = {Sriram Govindarajan and Iyad Ouaiss and Meenakshi Kaul and Vinoo Srinivasan and Ranga Vemuri}, title = {An Effective Design System for Dynamically Reconfigurable Architectures}, booktitle = {{FCCM}}, pages = {312--313}, publisher = {{IEEE} Computer Society}, year = {1998} }
@inproceedings{DBLP:conf/ipps/OuaissGSKV98, author = {Iyad Ouaiss and Sriram Govindarajan and Vinoo Srinivasan and Meenakshi Kaul and Ranga Vemuri}, title = {An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures}, booktitle = {{IPPS/SPDP} Workshops}, series = {Lecture Notes in Computer Science}, volume = {1388}, pages = {31--36}, publisher = {Springer}, year = {1998} }
@inproceedings{DBLP:conf/vlsid/SrinivasanV98, author = {Vinoo Srinivasan and Ranga Vemuri}, title = {A Retiming Based Relaxation Heuristic for Resource-Constrained Loop Pipelining}, booktitle = {{VLSI} Design}, pages = {435--441}, publisher = {{IEEE} Computer Society}, year = {1998} }
@inproceedings{DBLP:conf/asap/NarasimhanSVWGV96, author = {Naren Narasimhan and Vinoo Srinivasan and Madhavi Vootukuru and Jeffrey Walrath and Sriram Govindarajan and Ranga Vemuri}, title = {Rapid Prototyping of Reconfigurable Coprocessors}, booktitle = {{ASAP}}, pages = {303--312}, publisher = {{IEEE} Computer Society}, year = {1996} }
@inproceedings{DBLP:conf/eurodac/SrinivasanKV96, author = {Vinoo Srinivasan and Nand Kumar and Ranga Vemuri}, title = {Hierarchical behavioral partitioning for multicomponent synthesis}, booktitle = {{EURO-DAC}}, pages = {212--217}, publisher = {{IEEE} Computer Society Press}, year = {1996} }
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