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@article{DBLP:journals/iet-cdt/AkdemirS10,
  author       = {Kahraman D. Akdemir and
                  Berk Sunar},
  title        = {Generic approach for hardening state machines against strong adversaries},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {458--470},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0095},
  doi          = {10.1049/IET-CDT.2009.0095},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/AkdemirS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/Al-SulaifanieAZ10,
  author       = {Ahmed K. Al{-}Sulaifanie and
                  Arash Ahmadi and
                  Mark Zwolinski},
  title        = {Very large scale integration architecture for integer wavelet transform},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {471--483},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0021},
  doi          = {10.1049/IET-CDT.2009.0021},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/Al-SulaifanieAZ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/BernardiGRR10,
  author       = {Paolo Bernardi and
                  Michelangelo Grosso and
                  Maurizio Rebaudengo and
                  Matteo Sonza Reorda},
  title        = {Exploiting an infrastructure-intellectual property for systems-on-chip
                  test, diagnosis and silicon debug},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {2},
  pages        = {104--113},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0122},
  doi          = {10.1049/IET-CDT.2008.0122},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/BernardiGRR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/Bouhraoua10,
  author       = {Abdelhafid Bouhraoua},
  title        = {Design feasibility study for a 500 Gbits/s advanced encryption standard
                  cipher/decipher engine},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {334--348},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0023},
  doi          = {10.1049/IET-CDT.2009.0023},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/Bouhraoua10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ChenFXY10,
  author       = {Zhen Chen and
                  J. Feng and
                  Dong Xiang and
                  Boxue Yin},
  title        = {Scan chain configuration based X-filling for low power and high quality
                  testing},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {1--13},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0163},
  doi          = {10.1049/IET-CDT.2008.0163},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ChenFXY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ChiangLLHYCHLSSKT10,
  author       = {Meng{-}Hsueh Chiang and
                  Yi{-}Bo Liao and
                  Jun{-}Tin Lin and
                  Wei{-}Chou Hsu and
                  Chu Yu and
                  Pei{-}Chia Chiang and
                  Y.{-}Y. Hsu and
                  W.{-}H. Liu and
                  Shyh{-}Shyuan Sheu and
                  Keng{-}Li Su and
                  Ming{-}Jer Kao and
                  Ming{-}Jinn Tsai},
  title        = {Low power design of phase-change memory based on a comprehensive model},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {285--292},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0037},
  doi          = {10.1049/IET-CDT.2009.0037},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ChiangLLHYCHLSSKT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ChiuY10,
  author       = {Jih{-}Ching Chiu and
                  Ta{-}Li Yeh},
  title        = {{IRES:} An integrated software and hardware interface framework for
                  reconfigurable embedded system},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {27--37},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0010},
  doi          = {10.1049/IET-CDT.2009.0010},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ChiuY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ChoiC10,
  author       = {J. Choi and
                  H. Cha},
  title        = {System-level power management for system-on-a-chip -based mobile devices},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {400--409},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0074},
  doi          = {10.1049/IET-CDT.2008.0074},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ChoiC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/DashS10,
  author       = {Santanu Kumar Dash and
                  Thambipillai Srikanthan},
  title        = {Instruction cache tuning for embedded multitasking applications},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {439--457},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0066},
  doi          = {10.1049/IET-CDT.2009.0066},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/DashS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/DingWWLY10,
  author       = {Qian Ding and
                  Yu Wang and
                  Hui Wang and
                  Rong Luo and
                  Huazhong Yang},
  title        = {Output remapping technique for critical paths soft-error rate reduction},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {325--333},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0038},
  doi          = {10.1049/IET-CDT.2009.0038},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/DingWWLY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/EsmaeiliAC10,
  author       = {Seyed Ebrahim Esmaeili and
                  A. J. Al{-}Khalili and
                  Glenn E. R. Cowan},
  title        = {Dual-edge triggered sense amplifier flip-flop for resonant clock distribution
                  networks},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {499--514},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2010.0005},
  doi          = {10.1049/IET-CDT.2010.0005},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/EsmaeiliAC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/EsmaeiliFAC10,
  author       = {Seyed Ebrahim Esmaeili and
                  Ali M. Farhangi and
                  Asim J. Al{-}Khalili and
                  Glenn E. R. Cowan},
  title        = {Skew compensation in energy recovery clock distribution networks},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {56--72},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0155},
  doi          = {10.1049/IET-CDT.2008.0155},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/EsmaeiliFAC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/FuA10,
  author       = {Bo Fu and
                  Paul Ampadu},
  title        = {Error control combining Hamming and product codes for energy efficient
                  nanoscale on-chip interconnects},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {251--261},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0130},
  doi          = {10.1049/IET-CDT.2008.0130},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/FuA10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/GuillemenetTS10,
  author       = {Yoann Guillemenet and
                  Lionel Torres and
                  Gilles Sassatelli},
  title        = {Non-volatile run-time field-programmable gate arrays structures using
                  thermally assisted switching magnetic random access memories},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {211--226},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0019},
  doi          = {10.1049/IET-CDT.2009.0019},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/GuillemenetTS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/HigginsMM10,
  author       = {Michael Higgins and
                  Ciaran MacNamee and
                  Brendan Mullane},
  title        = {Design and implementation challenges for adoption of the {IEEE} 1500
                  standard},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {38--49},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0141},
  doi          = {10.1049/IET-CDT.2008.0141},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/HigginsMM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/JassaniUA10,
  author       = {B. A. Al Jassani and
                  Neil Urquhart and
                  A. E. A. Almaini},
  title        = {Manipulation and optimisation techniques for Boolean logic},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {227--239},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0007},
  doi          = {10.1049/IET-CDT.2009.0007},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/JassaniUA10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/KarimiyanSS10,
  author       = {Hossein Karimiyan and
                  Sayed Masoud Sayedi and
                  Hossein Saidi},
  title        = {Low-power dual-edge triggered state-retention scan flip-flop},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {410--419},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0059},
  doi          = {10.1049/IET-CDT.2009.0059},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/KarimiyanSS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/KebschullPT10,
  author       = {Udo Kebschull and
                  Marco Platzner and
                  J{\"{u}}rgen Teich},
  title        = {Selected papers from the 18\({}^{\mbox{th}}\) International Conference
                  on Field Programmable Logic and Applications {(FPL} 2008) [Editorial]},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {157--158},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2010.9044},
  doi          = {10.1049/IET-CDT.2010.9044},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/KebschullPT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/KimCK10,
  author       = {Jong{-}Myon Kim and
                  Sung Woo Chung and
                  Cheol Hong Kim},
  title        = {Energy-aware instruction cache design using small trace cache},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {293--305},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0049},
  doi          = {10.1049/IET-CDT.2009.0049},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/KimCK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LaiGW10,
  author       = {Ming{-}che Lai and
                  Lei Gao and
                  Zhiying Wang},
  title        = {Exploration and implementation of a highly efficient processor element
                  for multimedia and signal processing domains},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {374--387},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0041},
  doi          = {10.1049/IET-CDT.2009.0041},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/LaiGW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LiuTCSMG10,
  author       = {Feng Liu and
                  Qingping Tan and
                  Gang Chen and
                  Xiaoyu Song and
                  Otmane A{\"{\i}}t Mohamed and
                  Ming Gu},
  title        = {Field programmable gate array prototyping of end-around carry parallel
                  prefix tree architectures},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {306--316},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0036},
  doi          = {10.1049/IET-CDT.2009.0036},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/LiuTCSMG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LuMS10,
  author       = {Liang Lu and
                  John V. McCanny and
                  Sakir Sezer},
  title        = {Reconfigurable system-on-a-chip motion estimation architecture for
                  multi-standard video coding},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {349--364},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0106},
  doi          = {10.1049/IET-CDT.2008.0106},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/LuMS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MathewJSRP10,
  author       = {Jimson Mathew and
                  Abusaleh M. Jabir and
                  Ashutosh Kumar Singh and
                  Hafizur Rahaman and
                  Dhiraj K. Pradhan},
  title        = {A Galois field-based logic synthesis with testability},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {263--273},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0055},
  doi          = {10.1049/IET-CDT.2009.0055},
  timestamp    = {Thu, 14 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/MathewJSRP10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MeloukiSA10,
  author       = {Aissa Melouki and
                  Saket Srivastava and
                  Bashir M. Al{-}Hashimi},
  title        = {Fault-tolerance techniques for hybrid CMOS/nanoarchitecture},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {240--250},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0146},
  doi          = {10.1049/IET-CDT.2008.0146},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/MeloukiSA10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MitraSBKND10,
  author       = {Debasis Mitra and
                  Susmita Sur{-}Kolay and
                  Bhargab B. Bhattacharya and
                  Sandip Kundu and
                  Ashish Nigam and
                  Sandeep K. Dey},
  title        = {Test pattern generation for droop faults},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {274--284},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0024},
  doi          = {10.1049/IET-CDT.2009.0024},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/MitraSBKND10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ONeillR10,
  author       = {M{\'{a}}ire O'Neill and
                  Matthew J. B. Robshaw},
  title        = {Low-cost digital signature architecture suitable for radio frequency
                  identification tags},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {14--26},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0165},
  doi          = {10.1049/IET-CDT.2008.0165},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ONeillR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/OSullivanH10,
  author       = {David O'Sullivan and
                  Donal Heffernan},
  title        = {{VHDL} architecture for {IEC} 61499 function blocks},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {515--524},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0122},
  doi          = {10.1049/IET-CDT.2009.0122},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/OSullivanH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/OzturkKI10,
  author       = {Ozcan Ozturk and
                  Mahmut T. Kandemir and
                  Mary Jane Irwin},
  title        = {On-chip memory space partitioning for chip multiprocessors using polyhedral
                  algebra},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {6},
  pages        = {484--498},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0089},
  doi          = {10.1049/IET-CDT.2009.0089},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/OzturkKI10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/PomeranzR10,
  author       = {Irith Pomeranz and
                  Sudhakar M. Reddy},
  title        = {Diagnosis of path delay faults based on low-coverage tests},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {2},
  pages        = {89--103},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0154},
  doi          = {10.1049/IET-CDT.2008.0154},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/PomeranzR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/PomeranzR10a,
  author       = {Irith Pomeranz and
                  Sudhakar M. Reddy},
  title        = {Static test compaction for diagnostic test sets of full-scan circuits},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {365--373},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0110},
  doi          = {10.1049/IET-CDT.2009.0110},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/PomeranzR10a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/RahamanMJP10,
  author       = {Hafizur Rahaman and
                  Jimson Mathew and
                  Abusaleh M. Jabir and
                  Dhiraj K. Pradhan},
  title        = {Simplified bit parallel systolic multipliers for special class of
                  galois field (2\({}^{\mbox{m}}\)) with testability},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {428--437},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0068},
  doi          = {10.1049/IET-CDT.2009.0068},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/RahamanMJP10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/RakvicGCCMG10,
  author       = {Ryan N. Rakvic and
                  Jos{\'{e}} Gonz{\'{a}}lez and
                  Qiong Cai and
                  Pedro Chaparro and
                  Grigorios Magklis and
                  Antonio Gonz{\'{a}}lez},
  title        = {Energy efficiency via thread fusion and value reuse},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {2},
  pages        = {114--125},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0040},
  doi          = {10.1049/IET-CDT.2009.0040},
  timestamp    = {Sat, 29 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/RakvicGCCMG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SahaS10,
  author       = {Debasri Saha and
                  Susmita Sur{-}Kolay},
  title        = {Robust intellectual property protection of {VLSI} physical design},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {388--399},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0152},
  doi          = {10.1049/IET-CDT.2008.0152},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SahaS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SamalaD10,
  author       = {Harikrishna Samala and
                  Aravind Dasu},
  title        = {Methodology to derive resource aware context adaptable architectures
                  for FPGAs},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {73--88},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0047},
  doi          = {10.1049/IET-CDT.2009.0047},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SamalaD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SheL10,
  author       = {X. She and
                  N. Li},
  title        = {Low-overhead single-event upset hardened latch using programmable
                  resistance cells},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {5},
  pages        = {420--427},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0026},
  doi          = {10.1049/IET-CDT.2009.0026},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SheL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ShelburnePAJMF10,
  author       = {Matthew Shelburne and
                  Cameron D. Patterson and
                  Peter Athanas and
                  Mark Jones and
                  Brian S. Martin and
                  Ryan Fong},
  title        = {MetaWire: Using {FPGA} configuration circuitry to emulate a network-on-chip},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {159--169},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0009},
  doi          = {10.1049/IET-CDT.2009.0009},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/ShelburnePAJMF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/StottSC10,
  author       = {Edward A. Stott and
                  N. Pete Sedcole and
                  Peter Y. K. Cheung},
  title        = {Fault tolerance and reliability in field-programmable gate arrays},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {196--210},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0011},
  doi          = {10.1049/IET-CDT.2009.0011},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/StottSC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SudarsanamBCKD10,
  author       = {Arvind Sudarsanam and
                  Robert Collier Barnes and
                  J. Carver and
                  Ramachandra Kallam and
                  Aravind Dasu},
  title        = {Dynamically reconfigurable systolic array accelerators: {A} case study
                  with extended Kalman filter and discrete wavelet transform algorithms},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {2},
  pages        = {126--142},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0139},
  doi          = {10.1049/IET-CDT.2008.0139},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SudarsanamBCKD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SukhwaniH10,
  author       = {Bharat Sukhwani and
                  Martin C. Herbordt},
  title        = {{FPGA} acceleration of rigid-molecule docking codes},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {184--195},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0013},
  doi          = {10.1049/IET-CDT.2009.0013},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SukhwaniH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/TsengLL10,
  author       = {Wang{-}Dauh Tseng and
                  Lung{-}Jen Lee and
                  Rung{-}Bin Lin},
  title        = {Deterministic built-in self-test using multiple linear feedback shift
                  registers for test power and test volume reduction},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {4},
  pages        = {317--324},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0092},
  doi          = {10.1049/IET-CDT.2009.0092},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/TsengLL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/VakiliFM10,
  author       = {Shervin Vakili and
                  Sied Mehdi Fakhraie and
                  Siamak Mohammadi},
  title        = {Evolvable multi-processor: {A} novel MPSoC architecture with evolvable
                  task decomposition and scheduling},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {2},
  pages        = {143--156},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0120},
  doi          = {10.1049/IET-CDT.2008.0120},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/VakiliFM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/VorwerkKPKRDH10,
  author       = {Kristofer Vorwerk and
                  Andrew A. Kennings and
                  Val Pevzner and
                  Arun Kundu and
                  Madhu Raman and
                  Julien Dunoyer and
                  Yaun{-}shung Hsu},
  title        = {Power minimisation during field programmable gate array placement},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {3},
  pages        = {170--183},
  year         = {2010},
  url          = {https://doi.org/10.1049/iet-cdt.2009.0008},
  doi          = {10.1049/IET-CDT.2009.0008},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/VorwerkKPKRDH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/SheT10,
  title        = {Scheme to minimise short effects of single-event upsets in triple-modular
                  redundancy},
  journal      = {{IET} Comput. Digit. Tech.},
  volume       = {4},
  number       = {1},
  pages        = {50--55},
  year         = {2010},
  note         = {Withdrawn.},
  url          = {https://doi.org/10.1049/iet-cdt.2008.0157},
  doi          = {10.1049/IET-CDT.2008.0157},
  timestamp    = {Tue, 14 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cdt/SheT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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