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@inproceedings{DBLP:conf/vlsic/00020WNDB20,
author = {Xiao Wu and
Arun Subramaniyan and
Zhehong Wang and
Satish Narayanasamy and
Reetu Das and
David T. Blaauw},
title = {17.3 {GCUPS} Pruning-Based Pair-Hidden-Markov-Model Accelerator for
Next-Generation {DNA} Sequencing},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162986},
doi = {10.1109/VLSICIRCUITS18222.2020.9162986},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/00020WNDB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/0002CK20,
author = {Ibrahim Ahmed and
Po{-}Wei Chiu and
Chris H. Kim},
title = {A Probabilistic Self-Annealing Compute Fabric Based on 560 Hexagonally
Coupled Ring Oscillators for Solving Combinatorial Optimization Problems},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162869},
doi = {10.1109/VLSICIRCUITS18222.2020.9162869},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/0002CK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/0003STTLB20,
author = {Ming Ding and
Minyoung Song and
Evgenii Tiurin and
Stefano Traferro and
Yao{-}Hong Liu and
Christian Bachmann},
title = {A 0.9pJ/Cycle 8ppm/{\textdegree}C DFLL-Based Wakeup Timer Enabled
by a Time-Domain Trimming and An Embedded Temperature Sensing},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162787},
doi = {10.1109/VLSICIRCUITS18222.2020.9162787},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/0003STTLB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AhmedKWLSDRTD20,
author = {Zakir Zakir Ahmed and
Harish K. Krishnamurthy and
Sheldon Weng and
Xiaosen Liu and
Christopher Schaef and
Nachiket V. Desai and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {An Autonomous Reconfigurable Power Delivery Network {(RPDN)} for Many-Core
SoCs Featuring Dynamic Current Steering},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162827},
doi = {10.1109/VLSICIRCUITS18222.2020.9162827},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AhmedKWLSDRTD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AnVSWZWCLLLZGBD20,
author = {Hyochan An and
Siddharth Venkatesan and
Sam Schiferl and
Tim Wesley and
Qirui Zhang and
Jingcheng Wang and
Kyojin Choo and
Shiyu Liu and
Bowen Liu and
Ziyun Li and
Hengfei Zhong and
Luyao Gong and
David T. Blaauw and
Ronald G. Dreslinski and
Dennis Sylvester and
Hun{-}Seok Kim},
title = {A 170{\(\mu\)}W Image Signal Processor Enabling Hierarchical Image
Recognition for Intelligence at the Edge},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162810},
doi = {10.1109/VLSICIRCUITS18222.2020.9162810},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AnVSWZWCLLLZGBD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AugustinePMTKD20,
author = {Charles Augustine and
Somnath Paul and
Turbo Majumder and
James W. Tschanz and
Muhammad M. Khellah and
Vivek De},
title = {2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited Workloads},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162815},
doi = {10.1109/VLSICIRCUITS18222.2020.9162815},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AugustinePMTKD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AyalaTSNTY20,
author = {Christopher L. Ayala and
Tomoyuki Tanaka and
Ro Saito and
Mai Nozoe and
Naoki Takeuchi and
Nobuyuki Yoshikawa},
title = {{MANA:} {A} Monolithic Adiabatic iNtegration Architecture Microprocessor
using 1.4zJ/op Superconductor Josephson Junction Devices},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162792},
doi = {10.1109/VLSICIRCUITS18222.2020.9162792},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AyalaTSNTY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BooCKLKLA20,
author = {Jun{-}Ho Boo and
Kang{-}Il Cho and
Ho{-}Jin Kim and
Jae{-}Geun Lim and
Yong{-}Sik Kwak and
Seung{-}Hoon Lee and
Gil{-}Cho Ahn},
title = {A Single-Trim Switched Capacitor {CMOS} Bandgap Reference with a 3{\(\sigma\)}
Inaccuracy of +0.02{\%}, -0.12{\%} for Battery Monitoring Applications},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162987},
doi = {10.1109/VLSICIRCUITS18222.2020.9162987},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BooCKLKLA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BoujamaaAWGPKSS20,
author = {El Mehdi Boujamaa and
Samsudeen Mohamed Ali and
Steve Ngueya Wandji and
Alexandra Gourio and
Suk{-}Soo Pyo and
Gwanhyeob Koh and
Yoonjong Song and
Taejoong Song and
Jongwook Kye and
Jean{-}Christophe Vial and
Andrew Sowden and
Manuj Rathor and
Cyrille Dray},
title = {A 14.7Mb/mm\({}^{\mbox{2}}\) 28nm {FDSOI} {STT-MRAM} with Current
Starved Read Path, 52{\(\Omega\)}/Sigma Offset Voltage Sense Amplifier
and Fully Trimmable {CTAT} Reference},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162803},
doi = {10.1109/VLSICIRCUITS18222.2020.9162803},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BoujamaaAWGPKSS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/CaoCGCSR20,
author = {Ningyuan Cao and
Baibhab Chatterjee and
Minxiang Gong and
Muya Chang and
Shreyas Sen and
Arijit Raychowdhury},
title = {A 65nm Image Processing SoC Supporting Multiple {DNN} Models and Real-Time
Computation-Communication Trade-Off Via Actor-Critical Neuro-Controller},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162878},
doi = {10.1109/VLSICIRCUITS18222.2020.9162878},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/CaoCGCSR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/CaragiuloMAM20,
author = {Pietro Caragiulo and
Oscar Elisio Mattia and
Amin Arbabian and
Boris Murmann},
title = {A Compact 14 GS/s 8-Bit Switched-Capacitor {DAC} in 16 nm FinFET {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162776},
doi = {10.1109/VLSICIRCUITS18222.2020.9162776},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/CaragiuloMAM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChangCVVYWMBKPW20,
author = {Tengfei Chang and
Timothy Claeys and
Malisa Vucinic and
Xavier Vilajosana and
Titan Yuan and
Brad Wheeler and
Filip Maksimovic and
David C. Burnett and
Brian Kilberg and
Kris Pister and
Thomas Watteyne},
title = {Industrial IoT with Crystal-Free Mote-on-Chip},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162981},
doi = {10.1109/VLSICIRCUITS18222.2020.9162981},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ChangCVVYWMBKPW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenFCG20,
author = {Zhengyu Chen and
Sihua Fu and
Qiankai Cao and
Jie Gu},
title = {A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator
with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip
Training for Low Power Edge Devices},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162829},
doi = {10.1109/VLSICIRCUITS18222.2020.9162829},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ChenFCG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenLLLZKCLLT20,
author = {Hsuan{-}Yu Chen and
Wei{-}Tin Lin and
Cheng{-}Hsiang Liao and
Zong{-}Yi Lin and
Zhi{-}Qiang Zhang and
Yu{-}Yung Kao and
Ke{-}Horng Chen and
Ying{-}Hsi Lin and
Shian{-}Ru Lin and
Tsung{-}Yen Tsai},
title = {A Domino Bootstrapping 12V GaN Driver for Driving an On-Chip 650V
eGaN Power Switch for 96{\%} High Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162979},
doi = {10.1109/VLSICIRCUITS18222.2020.9162979},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenLLLZKCLLT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenWFTCHTLK20,
author = {Wei{-}Chih Chen and
Chin{-}Hua Wen and
Chin{-}Ming Fu and
Tsung{-}Hsien Tsai and
Yu{-}Chi Chen and
Wen{-}Hung Huang and
Chien{-}Chun Tsai and
Alvin Leng Sun Loke and
C. H. Kenny},
title = {A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with
Phase Error Correction in 5nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162794},
doi = {10.1109/VLSICIRCUITS18222.2020.9162794},
timestamp = {Fri, 01 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenWFTCHTLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChoiKOJLJ20,
author = {Moon{-}Chul Choi and
Han{-}Gon Ko and
Jonghyun Oh and
Hye{-}Yoon Joo and
Kwangho Lee and
Deog{-}Kyoon Jeong},
title = {A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting {MM}
{CDR} and Adaptive {DFE} with Single Shared Error Sampler},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162791},
doi = {10.1109/VLSICIRCUITS18222.2020.9162791},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ChoiKOJLJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChouCTLLKSCHL020,
author = {Mao{-}Hsuan Chou and
Ya{-}Tin Chang and
Tsung{-}Hsien Tsai and
Tsung{-}Che Lu and
Chia{-}Chun Liao and
Hung{-}Yi Kuo and
Ruey{-}Bin Sheen and
Chih{-}Hsien Chang and
Kenny C.{-}H. Hsieh and
Alvin Leng Sun Loke and
Mark Chen},
title = {Embedded {PLL} Phase Noise Measurement Based on a {PFD/CP} {MASH}
1-1-1 {\(\Delta\)}{\(\Sigma\)} Time-to-Digital Converter in 7nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162789},
doi = {10.1109/VLSICIRCUITS18222.2020.9162789},
timestamp = {Fri, 01 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChouCTLLKSCHL020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChouLLSTCTCOCCC20,
author = {Chung{-}Cheng Chou and
Zheng{-}Jun Lin and
Chien{-}An Lai and
Chin{-}I Su and
Pei{-}Ling Tseng and
Wei{-}Chi Chen and
Wu{-}Chin Tsai and
Wen{-}Ting Chu and
Tong{-}Chern Ong and
Harry Chuang and
Yu{-}Der Chih and
Tsung{-}Yung Jonathan Chang},
title = {A 22nm 96KX144 {RRAM} Macro with a Self-Tracking Reference and a Low
Ripple Charge Pump to Achieve a Configurable Read Window and a Wide
Operating Voltage Range},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163014},
doi = {10.1109/VLSICIRCUITS18222.2020.9163014},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChouLLSTCTCOCCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/CristianoLNAJ20,
author = {Giorgio Cristiano and
Jiawei Liao and
Alessandro Novello and
Gabriele Atzeni and
Taekwang Jang},
title = {A 8.7ppm/{\textdegree}C, 694nW, One-Point Calibrated {RC} Oscillator
using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled
Frequency-Locked Loops},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162838},
doi = {10.1109/VLSICIRCUITS18222.2020.9162838},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/CristianoLNAJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DissanayakeBMMC20,
author = {Anjana Dissanayake and
Henry L. Bishop and
Jesse Moody and
Henry Muhlbauer and
Benton H. Calhoun and
Steven M. Bowers},
title = {A Multichannel, MEMS-Less -99dBm 260nW Bit-Level Duty Cycled Wakeup
Receiver},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162785},
doi = {10.1109/VLSICIRCUITS18222.2020.9162785},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/DissanayakeBMMC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DuZLHDC20,
author = {Jieqiong Du and
Jia Zhou and
Chia{-}Jen Liang and
Boyu Hu and
Yuan Du and
Mau{-}Chung Frank Chang},
title = {A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed
Memory Interface},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162874},
doi = {10.1109/VLSICIRCUITS18222.2020.9162874},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/DuZLHDC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ElandKGVM20,
author = {Efra{\"{\i}}m Eland and
Shoubhik Karmakar and
Burak G{\"{o}}nen and
Robert H. M. van Veldhoven and
Kofi A. A. Makinwa},
title = {A 440{\(\mu\)}W, 109.8dB DR, 106.5dB {SNDR} Discrete-Time Zoom {ADC}
with a 20kHz {BW}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162856},
doi = {10.1109/VLSICIRCUITS18222.2020.9162856},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ElandKGVM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/FassioLRLCA20,
author = {Luigi Fassio and
Longyang Lin and
Raffaele De Rose and
Marco Lanuzza and
Felice Crupi and
Massimo Alioto},
title = {A 0.25-V, 5.3-pW Voltage Reference with 25-{\(\mu\)}V/{\textdegree}C
Temperature Coefficient, 140-{\(\mu\)}V/V Line Sensitivity and 2,
200-{\(\mu\)}m\({}^{\mbox{2}}\) Area in 180nm},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162872},
doi = {10.1109/VLSICIRCUITS18222.2020.9162872},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/FassioLRLCA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/FletcherMD20,
author = {Benjamin J. Fletcher and
Terrence S. T. Mak and
Shidhartha Das},
title = {A 3D-Stacked Cortex-M0 SoC with 20.3Gbps/mm\({}^{\mbox{2}}\) 7.1mW/mm\({}^{\mbox{2}}\)
Simultaneous Wireless Inter-Tier Data and Power Transfer},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162824},
doi = {10.1109/VLSICIRCUITS18222.2020.9162824},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/FletcherMD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/GomezBCC20,
author = {Ricardo Gomez Gomez and
Edwige Bano and
Andreia Cathelin and
Sylvain Clerc},
title = {A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F
SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation
in 28nm {FD-SOI}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162790},
doi = {10.1109/VLSICIRCUITS18222.2020.9162790},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/GomezBCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/GuoWKRSSKK20,
author = {Zheng Guo and
Jami Wiedemer and
Yusung Kim and
Prithvee Sundararajan Ramamoorthy and
Prateeksha Bindiganavile Sathyaprasad and
Smita Shridharan and
Daeyeon Kim and
Eric Karl},
title = {A 10nm {SRAM} Design using Gate-Modulated Self-Collapse Write Assist
Enabling 175mV {VMIN} Reduction with Negligible Power Overhead},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162782},
doi = {10.1109/VLSICIRCUITS18222.2020.9162782},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/GuoWKRSSKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/GuptaTC20,
author = {Shourya Gupta and
Daniel S. Truesdell and
Benton H. Calhoun},
title = {A 65nm 16kb {SRAM} with 131.5pW Leakage at 0.9V for Wireless IoT Sensor
Nodes},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162772},
doi = {10.1109/VLSICIRCUITS18222.2020.9162772},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/GuptaTC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HanJLJLLLHLBCLK20,
author = {Sangwook Han and
Jaehyuk Jang and
Jaeseung Lee and
Daechul Jeong and
Joonhee Lee and
Jongsoo Lee and
Chung Lau and
Juyoung Han and
Sung{-}Jun Lee and
Jeongyeol Bae and
Ikkyun Cho and
Sang{-}Yun Lee and
Shinwoong Kim and
Jae Hoon Lee and
Yanghoon Lee and
Jaehong Jung and
Junho Huh and
Jongwoo Lee and
Thomas Byunghak Cho and
Inyup Kang},
title = {An {RF} Transceiver with Full Digital Interface Supporting 5G New
Radio {FR1} with 3.84Gbps DL/1.92Gbps {UL} and Dual-Band {GNSS} in
14nm FinFET {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162850},
doi = {10.1109/VLSICIRCUITS18222.2020.9162850},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HanJLJLLLHLBCLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HershbergMLMDC20,
author = {Benjamin P. Hershberg and
Nereo Markulic and
Jorge Lagos and
Ewout Martens and
Davide Dermit and
Jan Craninckx},
title = {A 1MS/s to 1GS/s Ringamp-Based Pipelined {ADC} with Fully Dynamic
Reference Regulation and Stochastic Scope-on-Chip Background Monitoring
in 16nm},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162788},
doi = {10.1109/VLSICIRCUITS18222.2020.9162788},
timestamp = {Tue, 18 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/HershbergMLMDC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HongS20,
author = {Sungjin Hong and
Nan Sun},
title = {A Portable {NMR} System with 50-kHz IF, 10-us Dead Time, and Frequency
Tracking},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163029},
doi = {10.1109/VLSICIRCUITS18222.2020.9163029},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HongS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Hsu0RACKKSKKSMR20,
author = {Steven Hsu and
Amit Agarwal and
Simeon Realov and
Mark A. Anders and
Gregory K. Chen and
Monodeep Kar and
Raghavan Kumar and
Huseyin Sumbul and
Phil C. Knag and
Himanshu Kaul and
Vikram B. Suresh and
Sanu Mathew and
Iqbal Rajwani and
Satish Damaraju and
Ram Krishnamurthy and
Vivek De},
title = {Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI
Processors in 10nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163007},
doi = {10.1109/VLSICIRCUITS18222.2020.9163007},
timestamp = {Sun, 03 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/Hsu0RACKKSKKSMR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HuangCK20,
author = {Hung{-}Yi Huang and
Xin{-}Yu Chen and
Tai{-}Haur Kuo},
title = {A 177mW 10GS/s {NRZ} {DAC} with Switching-Glitch Compensation Achieving
{\textgreater} 64dBc {SFDR} and {\textless} -77dBc {IM3}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162931},
doi = {10.1109/VLSICIRCUITS18222.2020.9162931},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HuangCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HuangM20,
author = {Jiannan Huang and
Patrick P. Mercier},
title = {A -105dB {THD} 88dB-SNDR VCO-Based Sensor Front-End Enabled by Background-Calibrated
Differential Pulse Code Modulation},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162825},
doi = {10.1109/VLSICIRCUITS18222.2020.9162825},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HuangM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ImKHCY20,
author = {Dongseok Im and
Sanghoon Kang and
Donghyeon Han and
Sungpill Choi and
Hoi{-}Jun Yoo},
title = {A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor
for Hand Pose Estimation in Immersive Wearable Devices},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162895},
doi = {10.1109/VLSICIRCUITS18222.2020.9162895},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ImKHCY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/IshidaTNOKTFI20,
author = {Koki Ishida and
Masamitsu Tanaka and
Ikki Nagaoka and
Takatsugu Ono and
Satoshi Kawakami and
Teruo Tanimoto and
Akira Fujimaki and
Koji Inoue},
title = {32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor
Single-Flux-Quantum Logic},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162826},
doi = {10.1109/VLSICIRCUITS18222.2020.9162826},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/IshidaTNOKTFI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JeongKKB20,
author = {Seokhyeon Jeong and
Yejoong Kim and
Gyouho Kim and
David T. Blaauw},
title = {A Pressure Sensing System with {\(\pm\)}0.75 mmHg (3{\(\sigma\)})
Inaccuracy for Battery-Powered Low Power IoT Applications},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162778},
doi = {10.1109/VLSICIRCUITS18222.2020.9162778},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JeongKKB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JeongPHK20,
author = {Yong{-}Un Jeong and
Hyunkyu Park and
Changho Hyun and
Suhwan Kim},
title = {A 28-Gb/s/pin {PAM-4} Single-Ended Transmitter with High-Linearity
and Impedance-Matched Driver and 3-Point {ZQ} Calibration for Memory
Interfaces},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162864},
doi = {10.1109/VLSICIRCUITS18222.2020.9162864},
timestamp = {Wed, 28 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/JeongPHK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JiangQSMM20,
author = {Dongyang Jiang and
Liang Qi and
Sai{-}Weng Sin and
Franco Maloberti and
Rui Paulo Martins},
title = {A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2\({}^{\mbox{nd}}\)-Order
{\(\Delta\)}{\(\Sigma\)} Modulator with Digital Feedforward Extrapolation
in 28nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162798},
doi = {10.1109/VLSICIRCUITS18222.2020.9162798},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/JiangQSMM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JungJLJKHOL20,
author = {Jaehong Jung and
Sangdon Jung and
Kyungmin Lee and
Jun{-}Hee Jung and
Seungjin Kim and
Byungki Han and
Seunghyun Oh and
Jongwoo Lee},
title = {A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling
Ring {PLL} with a Jitter-Tracking DLL-Assisted {DTC}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162861},
doi = {10.1109/VLSICIRCUITS18222.2020.9162861},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JungJLJKHOL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KalyanamMBA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon{\texttrademark}
Processor},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162808},
doi = {10.1109/VLSICIRCUITS18222.2020.9162808},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KalyanamMBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Kar0HMCKSKAKBSK20,
author = {Monodeep Kar and
Amit Agarwal and
Steven Hsu and
David Moloney and
Gregory K. Chen and
Raghavan Kumar and
Huseyin Sumbul and
Phil C. Knag and
Mark A. Anders and
Himanshu Kaul and
Jonathan Byrne and
Luca Sarti and
Ram Krishnamurthy and
Vivek De},
title = {A Ray-Casting Accelerator in 10nm {CMOS} for Efficient 3D Scene Reconstruction
in Edge Robotics and Augmented Reality Applications},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163067},
doi = {10.1109/VLSICIRCUITS18222.2020.9163067},
timestamp = {Sun, 03 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/Kar0HMCKSKAKBSK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KatoMHOSMFOYKOT20,
author = {Yuri Kato and
Yoshihisa Matoba and
Katsumi Honda and
Koji Ogawa and
Kan Shimizu and
Masataka Maehara and
Atsushi Fujiwara and
Aoi Odawara and
Chigusa Yamane and
Naohiko Kimizuka and
Jun Ogi and
Tadayuki Taura and
Ikuro Suzuki and
Yusuke Oike},
title = {High-Density and Large-Scale {MEA} System Featuring 236, 880 Electrodes
at 11.72{\(\mu\)}m Pitch for Neuronal Network Analysis},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162947},
doi = {10.1109/VLSICIRCUITS18222.2020.9162947},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KatoMHOSMFOYKOT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimKCY20,
author = {Kwantae Kim and
Changhyeon Kim and
Sungpill Choi and
Hoi{-}Jun Yoo},
title = {A 0.5V, 6.2{\(\mu\)}W, 0.059mm\({}^{\mbox{2}}\) Sinusoidal Current
Generator {IC} with 0.088{\%} {THD} for Bio-Impedance Sensing},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162983},
doi = {10.1109/VLSICIRCUITS18222.2020.9162983},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimKCY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimLKLY20,
author = {Sangyeob Kim and
Juhyoung Lee and
Sanghoon Kang and
Jinmook Lee and
Hoi{-}Jun Yoo},
title = {A 146.52 {TOPS/W} Deep-Neural-Network Learning Processor with Stochastic
Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162795},
doi = {10.1109/VLSICIRCUITS18222.2020.9162795},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimLKLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimLLY020,
author = {Ji{-}Hoon Kim and
Juhyoung Lee and
Jinsu Lee and
Hoi{-}Jun Yoo and
Joo{-}Young Kim},
title = {{Z-PIM:} An Energy-Efficient Sparsity Aware Processing-In-Memory Architecture
with Fully-Variable Weight Precision},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163015},
doi = {10.1109/VLSICIRCUITS18222.2020.9163015},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimLLY020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimMHLH20,
author = {Sung{-}Jin Kim and
Zachary Myers and
Steven Herbst and
ByongChan Lim and
Mark Horowitz},
title = {Open-Source Synthesizable Analog Blocks for High-Speed Link Designs:
20-GS/s 5b {ENOB} Analog-to-Digital Converter and 5-GHz Phase Interpolator},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162800},
doi = {10.1109/VLSICIRCUITS18222.2020.9162800},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimMHLH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KnagCSKAKH0KKK20,
author = {Phil C. Knag and
Gregory K. Chen and
Huseyin Ekin Sumbul and
Raghavan Kumar and
Mark A. Anders and
Himanshu Kaul and
Steven K. Hsu and
Amit Agarwal and
Monodeep Kar and
Seongjong Kim and
Ram K. Krishnamurthy},
title = {A 617 {TOPS/W} All Digital Binary Neural Network Accelerator in 10nm
FinFET {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162949},
doi = {10.1109/VLSICIRCUITS18222.2020.9162949},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KnagCSKAKH0KKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KoCDWTR0W20,
author = {Glenn G. Ko and
Yuji Chai and
Marco Donato and
Paul N. Whatmough and
Thierry Tambe and
Rob A. Rutenbar and
David Brooks and
Gu{-}Yeon Wei},
title = {A 3mm\({}^{\mbox{2}}\) Programmable Bayesian Inference Accelerator
for Unsupervised Machine Perception using Parallel Gibbs Sampling
in 16nm},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162784},
doi = {10.1109/VLSICIRCUITS18222.2020.9162784},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KoCDWTR0W20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KosugeO20,
author = {Atsutake Kosuge and
Takashi Oshima},
title = {A 1200{\texttimes}1200 8-Edges/Vertex FPGA-Based Motion-Planning Accelerator
for Dual-Arm-Robot Manipulation Systems},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162951},
doi = {10.1109/VLSICIRCUITS18222.2020.9162951},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KosugeO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KulkarniMATTKD20,
author = {Jaydeep P. Kulkarni and
Andres Malavasi and
Charles Augustine and
Carlos Tokunaga and
Jim Tschanz and
Muhammad M. Khellah and
Vivek De},
title = {Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin,
Noise-Tolerant, High-Density, 1R1W 8T-Bitcell {SRAM} in 10nm FinFET
{CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162822},
doi = {10.1109/VLSICIRCUITS18222.2020.9162822},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KulkarniMATTKD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KumarLSKAKRDM20,
author = {Raghavan Kumar and
Xiaosen Liu and
Vikram B. Suresh and
Harish Krishnamurthy and
Mark A. Anders and
Himanshu Kaul and
Krishnan Ravichandran and
Vivek De and
Sanu Mathew},
title = {A SCA-Resistant {AES} Engine in 14nm {CMOS} with Time/Frequency-Domain
Leakage Suppression using Non-Linear Digital {LDO} Cascaded with Arithmetic
Countermeasures},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162988},
doi = {10.1109/VLSICIRCUITS18222.2020.9162988},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KumarLSKAKRDM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KumarSSAKDM20,
author = {Raghavan Kumar and
Sudhir Satpathy and
Vikram B. Suresh and
Mark A. Anders and
Himanshu Kaul and
Vivek De and
Sanu Mathew},
title = {A 435MHz, 2.5Mbps/W Side-Channel-Attack Resistant Crypto-Processor
for Secure {RSA-4K} Public-Key Encryption in 14nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162905},
doi = {10.1109/VLSICIRCUITS18222.2020.9162905},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KumarSSAKDM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KwonKPJLLLCL20,
author = {Yong{-}Il Kwon and
M. Kim and
S. Park and
M. Jeong and
S. M. Lee and
S. H. Lee and
W. H. Lee and
Y. K. Choi and
J. Y. Lee},
title = {A Low Noise Read-Out {IC} with Gate Driver for Full Front Display
Area Optical Fingerprint Sensors},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162909},
doi = {10.1109/VLSICIRCUITS18222.2020.9162909},
timestamp = {Mon, 23 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KwonKPJLLLCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeKBHMF20,
author = {Seungjong Lee and
Taewook Kang and
John Bell and
Mohammad R. Haghighat and
Alberto J. Martinez and
Michael P. Flynn},
title = {An 8-Element Frequency-Selective Acoustic Beamformer and Bitstream
Feature Extractor with 60 Mel-Frequency Energy Features Enabling 95{\%}
Speech Recognition Accuracy},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162783},
doi = {10.1109/VLSICIRCUITS18222.2020.9162783},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeKBHMF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeKKCK20,
author = {Ji{-}Hun Lee and
Gyeong{-}Gu Kang and
Min{-}Woo Ko and
Gyu{-}Hyeong Cho and
Hyun{-}Sik Kim},
title = {An 8{\(\Omega\)}, 1.4W, 0.0024{\%} {THD+N} Class-D Audio Amplifier
with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby
Quiescent Current of 660{\(\mu\)}A},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162781},
doi = {10.1109/VLSICIRCUITS18222.2020.9162781},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeKKCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeNKCLYSKLJCJJ20,
author = {Jang{-}Woo Lee and
Dae{-}Hoon Na and
Anil Kavala and
Hwasuk Cho and
Junha Lee and
Manjae Yang and
Eunjin Song and
Tongsung Kim and
Seon{-}Kyoo Lee and
Dong{-}Su Jang and
Byung{-}Kwan Chun and
Youngmin Jo and
Sunwon Jung and
Doo{-}Il Jung and
Chan{-}ho Kim and
Daewoon Kang and
Tae{-}Sung Lee and
Byunghoon Jeong and
Chiweon Yoon and
Dongku Kang and
Seungjae Lee and
Jungdon Ihm and
Dae{-}Seok Byeon and
Jin{-}Yup Lee and
Sangjoon Hwang and
Jai Hyuk Song},
title = {A 1.8 Gb/s/pin 16Tb {NAND} Flash Memory Multi-Chip Package with F-Chip
of Toggle 4.0 Specification for High Performance and High Capacity
Storage Systems},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163052},
doi = {10.1109/VLSICIRCUITS18222.2020.9163052},
timestamp = {Wed, 04 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeNKCLYSKLJCJJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeW20,
author = {Yunsup Lee and
Andrew Waterman},
title = {Managing Chip Design Complexity in the Domain-Specific SoC Era},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162812},
doi = {10.1109/VLSICIRCUITS18222.2020.9162812},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Li0MTSHS20,
author = {Zhelu Li and
Arnab Dutta and
Abhishek Mukherjee and
Xiyuan Tang and
Linxiao Shen and
Lenian He and
Nan Sun},
title = {A {SAR} {ADC} with Reduced kT/C Noise by Decoupling Noise {PSD} and
{BW}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162846},
doi = {10.1109/VLSICIRCUITS18222.2020.9162846},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Li0MTSHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiCGMFP20,
author = {Xiaoliang Li and
Vincent P. J. Chung and
Metin G. Guney and
Tamal Mukherjee and
Gary K. Fedder and
Jeyanandh Paramesh},
title = {A Reconfigurable High-Bandwidth {CMOS-MEMS} Capacitive Accelerometer
Array with High-g Measurement Capability and Low Bias Instability},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162806},
doi = {10.1109/VLSICIRCUITS18222.2020.9162806},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LiCGMFP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LinBHTVVGLCWSTI20,
author = {Haidang Lin and
Charles Boecker and
Masum Hossain and
Shankar Tangirala and
Roxanne Vu and
Socrates D. Vamvakos and
Eric Groen and
Simon Li and
Prashant Choudhary and
Nanyan Wang and
Masumi Shibata and
Hossein Taghavi and
Marcus van Ierssel and
AdilHussain Maniyar and
Adam Wodkowski and
Nhat Nguyen and
Shaishav Desai},
title = {A 4{\texttimes}112 Gb/s {ADC-DSP} Based Multistandard Receiver in
7nm FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162802},
doi = {10.1109/VLSICIRCUITS18222.2020.9162802},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LinBHTVVGLCWSTI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LinJA20,
author = {Longyang Lin and
Saurabh Jain and
Massimo Alioto},
title = {Multi-Sensor Platform with Five-Order-of-Magnitude System Power Adaptation
down to 3.1nW and Sustained Operation under Moonlight Harvesting},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162898},
doi = {10.1109/VLSICIRCUITS18222.2020.9162898},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LinJA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiuKBHBCARTD20,
author = {Xiaosen Liu and
Harish K. Krishnamurthy and
Claudia P. Barrera and
Jing Han and
Rajasekhara M. Narayana Bhatla and
Scott Chiu and
Khondker Zakir Ahmed and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A Dual-Rail Hybrid Analog/Digital {LDO} with Dynamic Current Steering
for Tunable High {PSRR} and High Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162880},
doi = {10.1109/VLSICIRCUITS18222.2020.9162880},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/LiuKBHBCARTD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LyuT20,
author = {Yifan Lyu and
Filip Tavernier},
title = {A 1 GS/s Reconfigurable {BW} 2\({}^{\mbox{nd}}\)-Order Noise-Shaping
Hybrid Voltage-Time Two-Step {ADC} Achieving 170.9 dB FoMS},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162805},
doi = {10.1109/VLSICIRCUITS18222.2020.9162805},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LyuT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/MomsonDY0K20,
author = {Ibukunoluwa Momson and
Shenggang Dong and
Pavan Yelleswarapu and
Wooyeol Choi and
Kenneth K. O},
title = {315-GHz Self-Synchronizing Minimum Shift Keying Receiver in 65-nm
{CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162779},
doi = {10.1109/VLSICIRCUITS18222.2020.9162779},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/MomsonDY0K20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/NatsuiTHWNZTINY20,
author = {Masanori Natsui and
Akira Tamakoshi and
Hiroaki Honjo and
Toshinari Watanabe and
Takashi Nasuno and
Chaoliang Zhang and
Takaho Tanigawa and
Hirofumi Inoue and
Masaaki Niwa and
Toru Yoshiduka and
Yasuo Noguchi and
Mitsuo Yasuhira and
Yitao Ma and
Hui Shen and
Shunsuke Fukami and
Hideo Sato and
Shoji Ikeda and
Hideo Ohno and
Tetsuo Endoh and
Takahiro Hanyu},
title = {Dual-Port Field-Free {SOT-MRAM} Achieving 90-MHz Read and 60-MHz Write
Operations under 55-nm {CMOS} Technology and 1.2-V Supply Voltage},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162774},
doi = {10.1109/VLSICIRCUITS18222.2020.9162774},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/NatsuiTHWNZTINY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/NikoofardZM20,
author = {Ali Nikoofard and
Hamed Abbasi Zadeh and
Patrick P. Mercier},
title = {A 920MHz 16-FSK Receiver Achieving a Sensitivity of -103dBm at 0.6mW
Via an Integrated N-Path Filter Bank},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162816},
doi = {10.1109/VLSICIRCUITS18222.2020.9162816},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/NikoofardZM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OhLKZSAVFGCWMBB20,
author = {Jinwook Oh and
Sae Kyu Lee and
Mingu Kang and
Matthew M. Ziegler and
Joel Silberman and
Ankur Agrawal and
Swagath Venkataramani and
Bruce M. Fleischer and
Michael Guillorn and
Jungwook Choi and
Wei Wang and
Silvia M. Mueller and
Shimon Ben{-}Yehuda and
James Bonanno and
Nianzheng Cao and
Robert Casatuta and
Chia{-}Yu Chen and
Matt Cohen and
Ophir Erez and
Thomas W. Fox and
George Gristede and
Howard Haynie and
Vicktoria Ivanov and
Siyu Koswatta and
Shih{-}Hsien Lo and
Martin Lutz and
Gary W. Maier and
Alex Mesh and
Yevgeny Nustov and
Scot Rider and
Marcel Schaal and
Michael Scheuermann and
Xiao Sun and
Naigang Wang and
Fanchieh Yee and
Ching Zhou and
Vinay Shah and
Brian W. Curran and
Vijayalakshmi Srinivasan and
Pong{-}Fei Lu and
Sunil Shukla and
Kailash Gopalakrishnan and
Leland Chang},
title = {A 3.0 {TFLOPS} 0.62V Scalable Processor Core for High Compute Utilization
{AI} Training and Inference},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162917},
doi = {10.1109/VLSICIRCUITS18222.2020.9162917},
timestamp = {Sat, 19 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OhLKZSAVFGCWMBB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OhMLKAR20,
author = {Dong{-}Ryeol Oh and
Kyoung{-}Jun Moon and
Won{-}Mook Lim and
Ye{-}Dam Kim and
Eun{-}Ji An and
Seung{-}Tak Ryu},
title = {An 8b 1GS/s 2.55mW SAR-Flash {ADC} with Complementary Dynamic Amplifiers},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163064},
doi = {10.1109/VLSICIRCUITS18222.2020.9163064},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OhMLKAR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OsadaXI20,
author = {Masaru Osada and
Zule Xu and
Tetsuya Iizuka},
title = {A 3.2-to-3.8GHz Calibration-Free Harmonic-Mixer-Based Dual-Feedback
Fractional-N {PLL} Achieving -66dBc Worst-Case In-Band Fractional
Spur},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162799},
doi = {10.1109/VLSICIRCUITS18222.2020.9162799},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OsadaXI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PanadesTCCLJMCQ20,
author = {Ivan Miro Panades and
Beno{\^{\i}}t Tain and
Jean{-}Fr{\'{e}}d{\'{e}}ric Christmann and
David Coriat and
Romain Lemaire and
Clement Jany and
Baudouin Martineau and
Fabrice Chaix and
Anthony Quelen and
Emmanuel Pluchart and
Jean{-}Philippe Noel and
Reda Boumchedda and
Adam Makosiej and
Maxime Montoya and
Simone Bacles{-}Min and
David Briand and
Jean{-}Marc Philippe and
Alexandre Valentian and
Fr{\'{e}}d{\'{e}}ric Heitzmann and
Edith Beign{\'{e}} and
Fabien Clermidy},
title = {SamurAI: {A} 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000{\texttimes}
Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W {ML}
Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163000},
doi = {10.1109/VLSICIRCUITS18222.2020.9163000},
timestamp = {Sat, 19 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/PanadesTCCLJMCQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PangLLASFYZCHGW20,
author = {Jian Pang and
Zheng Li and
Xueting Luo and
Joshua Alvin and
Rattanan Saengchan and
Ashbir Aviat Fadila and
Kiyoshi Yanagisawa and
Yi Zhang and
Zixin Chen and
Zhongliang Huang and
Xiaofan Gu and
Rui Wu and
Yun Wang and
Dongwon You and
Bangan Liu and
Zheng Sun and
Yucheng Zhang and
Hongye Huang and
Naoki Oshima and
Keiichi Motoi and
Shinichi Hori and
Kazuaki Kunihiro and
Tomoya Kaneko and
Atsushi Shirane and
Kenichi Okada},
title = {A 28-GHz {CMOS} Phased-Array Beamformer Supporting Dual-Polarized
{MIMO} with Cross-Polarization Leakage Cancellation},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162882},
doi = {10.1109/VLSICIRCUITS18222.2020.9162882},
timestamp = {Tue, 26 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/PangLLASFYZCHGW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ParkUHVWL20,
author = {Dae{-}Woong Park and
Dzuhri Radityo Utomo and
Jong{-}Phil Hong and
Kristof Vaesen and
Piet Wambacq and
Sang{-}Gug Lee},
title = {A 247 and 272 GHz Two-Stage Regenerative Amplifiers in 65 nm {CMOS}
with 18 and 15 dB Gain Based on Double-Gmax Gain Boosting Technique},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162862},
doi = {10.1109/VLSICIRCUITS18222.2020.9162862},
timestamp = {Wed, 02 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ParkUHVWL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PaulMAMUKKCYBOL20,
author = {Somnath Paul and
Turbo Majumder and
Charles Augustine and
Andres F. Malavasi and
S. Usirikayala and
Raghavan Kumar and
Jisna Kollikunnel and
S. Chhabra and
Satish Yada and
M. L. Barajas and
C. Ornelas and
Dan Lake and
Muhammad M. Khellah and
Jim Tschanz and
Vivek De},
title = {A 0.05pJ/Pixel 70fps {FHD} 1Meps Event-Driven Visual Data Processing
Unit},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162948},
doi = {10.1109/VLSICIRCUITS18222.2020.9162948},
timestamp = {Mon, 03 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/PaulMAMUKKCYBOL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PimentaGWOBM20,
author = {Matheus F. Pimenta and
{\c{C}}agri G{\"{u}}rley{\"{u}}k and
Paul Walsh and
Daniel O'Keeffe and
Masoud Babaie and
Kofi A. A. Makinwa},
title = {A 200{\(\mu\)}W Eddy Current Displacement Sensor with 6.7nmRMS Resolution},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162849},
doi = {10.1109/VLSICIRCUITS18222.2020.9162849},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/PimentaGWOBM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PrinzieABCGST20,
author = {Jeffrey Prinzie and
Shuja Andrabi and
Christophe Beghein and
Changhua Cao and
Xiaochuan Guo and
Jon Strange and
Bernard Tenbroek},
title = {A Fast Locking 5.8 - 7.2 GHz Fractional-N Synthesizer with Sub-2 us
Settling Time in 22 nm {FDSOI}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162828},
doi = {10.1109/VLSICIRCUITS18222.2020.9162828},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/PrinzieABCGST20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ProeselDABDBCL20,
author = {Jonathan E. Proesel and
Nicolas Dupuis and
Herschel A. Ainspan and
Christian W. Baks and
Fuad E. Doany and
Nicolas Boyer and
Elaine Cyr and
Benjamin G. Lee},
title = {A Monolithically Integrated Silicon Photonics 8{\texttimes}8 Switch
in 90nm {SOI} {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162996},
doi = {10.1109/VLSICIRCUITS18222.2020.9162996},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ProeselDABDBCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/QiuST20,
author = {Hao Qiu and
Toru Sai and
Makoto Takamiya},
title = {A 6.78 MHz Wireless Power Transfer System Enabling Perpendicular Wireless
Powering with Efficiency Increase from 0.02{\%} to 48.2{\%} by Adaptive
Magnetic Field Adder {IC} Integrating Shared Coupling Coefficient
Sensor},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162904},
doi = {10.1109/VLSICIRCUITS18222.2020.9162904},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/QiuST20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RaducanuASLQSBH20,
author = {Bogdan C. Raducanu and
Samira Zali Asl and
Stefano Stanzione and
Chris van Liempd and
Andr{\'{e}}s V{\'{a}}squez Quintero and
Herbert De Smet and
Johan de Baets and
Chris Van Hoof and
Nick Van Helleputte},
title = {An Artificial Iris {ASIC} with High Voltage Liquid Crystal Driver,
10 nA Light Range Detector and 40 nA Blink Detector for {LCD} Flicker
Removal},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163057},
doi = {10.1109/VLSICIRCUITS18222.2020.9163057},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RaducanuASLQSBH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RentmeisterKPS20,
author = {Jan S. Rentmeister and
M. Hassan Kiani and
Kristofer S. J. Pister and
Jason T. Stauth},
title = {A 120-330V, Sub-{\(\mu\)}A, 4-Channel Driver for Microrobotic Actuators
with Wireless-Optical Power Delivery and over 99{\%} Current Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162908},
doi = {10.1109/VLSICIRCUITS18222.2020.9162908},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RentmeisterKPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RotheOCJCSB20,
author = {Rohit Rothe and
Sechang Oh and
Kyojin David Choo and
Seokhyeon Jeong and
Minchang Cho and
Dennis Sylvester and
David T. Blaauw},
title = {Sample and Average Common-Mode Feedback in a 101 nW Acoustic Amplifier},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162804},
doi = {10.1109/VLSICIRCUITS18222.2020.9162804},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RotheOCJCSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Salem20,
author = {Loai G. Salem},
title = {An N-Path Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting
Achieving 13.9{\texttimes} Power Extraction Improvement},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162847},
doi = {10.1109/VLSICIRCUITS18222.2020.9162847},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Salem20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SeoYKKKCC20,
author = {Hyeongseok Seo and
Heesun Yoon and
Dongkyu Kim and
Jungwoo Kim and
Seong{-}Jin Kim and
Jung{-}Hoon Chun and
Jaehyuk Choi},
title = {A 36-Channel SPAD-Integrated Scanning LiDAR Sensor with Multi-Event
Histogramming {TDC} and Embedded Interference Filter},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162807},
doi = {10.1109/VLSICIRCUITS18222.2020.9162807},
timestamp = {Wed, 06 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SeoYKKKCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShinKJCJCLKHJ20,
author = {Hongseok Shin and
Jinuk Kim and
Doojin Jang and
Donghee Cho and
Yoontae Jung and
Hyungjoo Cho and
Unbong Lee and
Chul Kim and
Sohmyung Ha and
Minkyu Je},
title = {A 0.0046mm\({}^{\mbox{2}}\) 6.7{\(\mu\)}W Three-Stage Amplifier Capable
of Driving 0.5-to-1.9nF Capacitive Load with {\textgreater}0.68MHz
{GBW} without Compensation Zero},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162960},
doi = {10.1109/VLSICIRCUITS18222.2020.9162960},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ShinKJCJCLKHJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShinKKK20,
author = {Hoyoung Shin and
Jisung Kim and
Shinwuk Kang and
Sungung Kwak},
title = {A 28nm 10Mb Embedded Flash Memory for IoT Product with Ultra-Low Power
Near-1V Supply Voltage and High Temperature for Grade 1 Operation},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162813},
doi = {10.1109/VLSICIRCUITS18222.2020.9162813},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShinKKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SongKCLK20,
author = {Tae{-}Gyun Song and
Dong{-}Kyu Kim and
Jeong{-}Hyun Cho and
Ji{-}Hun Lee and
Hyun{-}Sik Kim},
title = {A 50.7dB-DR Finger-Resistance Extractable Multi-Touch Sensor {IC}
Achieving Finger-Classification Accuracy of 97.7{\%} on 6.7-Inch Capacitive
Touch Screen Panel},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162818},
doi = {10.1109/VLSICIRCUITS18222.2020.9162818},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/SongKCLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SunB00P020,
author = {Xun Sun and
Akshat Boora and
Rajesh Pamula and
Chi{-}Hsiang Huang and
Diego Pe{\~{n}}a{-}Colaiocco and
Visvesh S. Sathe},
title = {Model Predictive Control of an Integrated Buck Converter for Digital
SoC Domains in 65nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163012},
doi = {10.1109/VLSICIRCUITS18222.2020.9163012},
timestamp = {Thu, 29 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SunB00P020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SunB0HP020,
author = {Xun Sun and
Akshat Boora and
Rajesh Pamula and
Chi{-}Hsiang Huang and
Diego Pe{\~{n}}a{-}Colaiocco and
Visvesh S. Sathe},
title = {UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery
in 65nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162982},
doi = {10.1109/VLSICIRCUITS18222.2020.9162982},
timestamp = {Thu, 29 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SunB0HP020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SureshKAKDM20,
author = {Vikram B. Suresh and
Raghavan Kumar and
Mark A. Anders and
Himanshu Kaul and
Vivek De and
Sanu Mathew},
title = {A 0.26{\%} BER, 10\({}^{\mbox{28}}\) Challenge-Response Machine-Learning
Resistant Strong-PUF in 14nm {CMOS} Featuring Stability-Aware Adversarial
Challenge Selection},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162890},
doi = {10.1109/VLSICIRCUITS18222.2020.9162890},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SureshKAKDM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TaKKSHSKOKOKSOS20,
author = {Tuan Thanh Ta and
Hiroshi Kubota and
Koichi Kokubun and
Toshiki Sugimoto and
Masatoshi Hirono and
Mitsuhiro Sengoku and
Hisaaki Katagiri and
Hidenori Okuni and
Satoshi Kondo and
Shinichi Ohtsuka and
Honam Kwon and
Keita Sasaki and
Yutaka Ota and
Kazuhiro Suzuki and
Katsuyuki Kimura and
Kentaro Yoshioka and
Akihide Sai and
Nobu Matsumoto},
title = {A 2D-SPAD Array and Read-Out {AFE} for Next-Generation Solid-State
LiDAR},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162831},
doi = {10.1109/VLSICIRCUITS18222.2020.9162831},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/TaKKSHSKOKOKSOS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TangSXLCZS20,
author = {Xiyuan Tang and
Yi Shen and
Xin Xin and
Shubin Liu and
Jueping Cai and
Zhangming Zhu and
Nan Sun},
title = {A 10-Bit 100-MS/s {SAR} {ADC} with Always-on Reference Ripple Cancellation},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162786},
doi = {10.1109/VLSICIRCUITS18222.2020.9162786},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/TangSXLCZS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TengCW20,
author = {Chieh{-}Fang Teng and
Chun{-}Hsiang Chen and
An{-}Yeu Andy Wu},
title = {An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted
Polar Decoder with Multi-Code Length Support},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163022},
doi = {10.1109/VLSICIRCUITS18222.2020.9163022},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/TengCW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ThielemansT20,
author = {Tim Thielemans and
Filip Tavernier},
title = {A 4V-0.55V Input Fully Integrated Switched-Capacitor Converter Enabling
Dynamic Voltage Domain Stacking and Achieving 80.1{\%} Average Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162820},
doi = {10.1109/VLSICIRCUITS18222.2020.9162820},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ThielemansT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Truesdell0C20,
author = {Daniel S. Truesdell and
Shuo Li and
Benton H. Calhoun},
title = {A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm {CMOS}
with 96.1ppm/{\textdegree}C Stability using a Duty-Cycled Digital
Frequency-Locked Loop},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162832},
doi = {10.1109/VLSICIRCUITS18222.2020.9162832},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Truesdell0C20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/UtomoPYL20,
author = {Dzuhri Radityo Utomo and
Dae{-}Woong Park and
Byeonghun Yun and
Sang{-}Gug Lee},
title = {A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9
dBm Output Power and 2.9/0.6 {\%} DC-to-RF Efficiency in 65 nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162796},
doi = {10.1109/VLSICIRCUITS18222.2020.9162796},
timestamp = {Wed, 02 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/UtomoPYL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/VerdantGRMMLCGD20,
author = {Arnaud Verdant and
William Guicquero and
Nicolas Royer and
Guillaume Moritz and
S{\'{e}}bastien Martin and
Florent Lepin and
Sylvain Choisnet and
Fabrice Guellec and
Beno{\^{\i}}t Deschamps and
Sylvain Clerc and
J{\'{e}}r{\^{o}}me Chossat},
title = {A 3.0{\(\mu\)}W@5fps {QQVGA} Self-Controlled Wake-Up Imager with On-Chip
Motion Detection, Auto-Exposure and Object Recognition},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162854},
doi = {10.1109/VLSICIRCUITS18222.2020.9162854},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/VerdantGRMMLCGD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WangABDC20,
author = {Peng Wang and
Rishika Agarwala and
Henry L. Bishop and
Anjana Dissanayake and
Benton H. Calhoun},
title = {A 785nW Multimodal {(V/I/R)} Sensor Interface {IC} for Ozone Pollutant
Sensing and Correlated Cardiovascular Disease Monitoring},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162901},
doi = {10.1109/VLSICIRCUITS18222.2020.9162901},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WangABDC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WangAZKBS20,
author = {Jingcheng Wang and
Hyochan An and
Qirui Zhang and
Hun{-}Seok Kim and
David T. Blaauw and
Dennis Sylvester},
title = {1.03pW/b Ultra-Low Leakage Voltage-Stacked {SRAM} for Intelligent
Edge Processors},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162843},
doi = {10.1109/VLSICIRCUITS18222.2020.9162843},
timestamp = {Thu, 12 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WangAZKBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WangLX0SCTCCSKB20,
author = {Zhehong Wang and
Ziyun Li and
Li Xu and
Qing Dong and
Chin{-}I Su and
Wen{-}Ting Chu and
George Tsou and
Yu{-}Der Chih and
Tsung{-}Yung Jonathan Chang and
Dennis Sylvester and
Hun{-}Seok Kim and
David T. Blaauw},
title = {An All-Weights-on-Chip {DNN} Accelerator in 22nm {ULL} Featuring 24{\texttimes}1
Mb eRRAM},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162811},
doi = {10.1109/VLSICIRCUITS18222.2020.9162811},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WangLX0SCTCCSKB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WangM20,
author = {Po{-}Han Peter Wang and
Patrick P. Mercier},
title = {A 4.4{\(\mu\)}W -92/-90.3dBm Sensitivity Dual-Mode BLE/Wi-Fi Wake-up
Receiver},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162819},
doi = {10.1109/VLSICIRCUITS18222.2020.9162819},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WangM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WangPZWXZKC20,
author = {Jun Wang and
Akshay Paul and
Dinghong Zhang and
Jiajia Wu and
Yuchen Xu and
Yimin Zou and
Chul Kim and
Gert Cauwenberghs},
title = {1024-Electrode Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip
with Dynamic Incremental-SAR Acquisition},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162837},
doi = {10.1109/VLSICIRCUITS18222.2020.9162837},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WangPZWXZKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WenLWKY20,
author = {Chi{-}Chih Wen and
Yu{-}Chi Lee and
Yi{-}Chung Wu and
Chen{-}Chien Kao and
Chia{-}Hsiang Yang},
title = {A 1.96 Gb/s Massive {MU-MIMO} Detector for Next-Generation Cellular
Systems},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163045},
doi = {10.1109/VLSICIRCUITS18222.2020.9163045},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/WenLWKY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WuBSH20,
author = {Lianbo Wu and
Thomas Burger and
Philipp Sch{\"{o}}nle and
Qiuting Huang},
title = {A 3.3-GHz 101fsrms-Jitter, -250.3dB {FOM} Fractional-N {DPLL} with
Phase Error Detection Accomplished in Fully Differential Voltage Domain},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162777},
doi = {10.1109/VLSICIRCUITS18222.2020.9162777},
timestamp = {Wed, 19 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WuBSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/XinPBCH20,
author = {Haoming Xin and
Kevin Pelzers and
Peter G. M. Baltus and
Eugenio Cantatore and
Pieter Harpe},
title = {A 4.3fJ/Conversion-Step 6440{\(\mu\)}m\({}^{\mbox{2}}\) All-Dynamic
Capacitance-to-Digital Converter with Energy-Efficient Charge Reuse},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162817},
doi = {10.1109/VLSICIRCUITS18222.2020.9162817},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/XinPBCH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Xing00CM20,
author = {Kai Xing and
Wei Wang and
Yan Zhu and
Chi{-}Hang Chan and
Rui Paulo Martins},
title = {A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order {CTSDM} with SAB-ELD-Merged
Integrator and 3-Stage Opamp},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162797},
doi = {10.1109/VLSICIRCUITS18222.2020.9162797},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Xing00CM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YabuuchiMTT20,
author = {Makoto Yabuuchi and
Masao Morimoto and
Yasumasa Tsukamoto and
Shinji Tanaka},
title = {A 7nm Fin-FET 4.04-Mb/mm2 {TCAM} with Improved Electromigration Reliability
Using Far-Side Driving Scheme and Self-Adjust Reference Match-Line
Amplifier},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162775},
doi = {10.1109/VLSICIRCUITS18222.2020.9162775},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YabuuchiMTT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YanM20,
author = {Dong Yan and
Dongsheng Brian Ma},
title = {An Automotive-Use Battery-to-Load GaN-Based Power Converter with Anti-Aliasing
Multi-Rate Spread-Spectrum Modulation and In-Cycle {ZVS} Switching},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162840},
doi = {10.1109/VLSICIRCUITS18222.2020.9162840},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YanM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YangXXL0ZC020,
author = {Jianguo Yang and
Xiaoyong Xue and
Xiaoxin Xu and
Hangbing Lv and
Feng Zhang and
Xiaoyang Zeng and
Meng{-}Fan Chang and
Ming Liu},
title = {A 28nm 1.5Mb Embedded 1T2R {RRAM} with 14.8 Mb/mm\({}^{\mbox{2}}\)
using Sneaking Current Suppression and Compensation Techniques},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163035},
doi = {10.1109/VLSICIRCUITS18222.2020.9163035},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YangXXL0ZC020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YokoyamaTTMYIT20,
author = {Yoshisato Yokoyama and
Miki Tanaka and
Koji Tanaka and
Masao Morimoto and
Makoto Yabuuchi and
Yuichiro Ishii and
Shinji Tanaka},
title = {A 29.2 Mb/mm\({}^{\mbox{2}}\) Ultra High Density {SRAM} Macro using
7nm FinFET Technology with Dual-Edge Driven Wordline/Bitline and Write/Read-Assist
Circuit},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162985},
doi = {10.1109/VLSICIRCUITS18222.2020.9162985},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YokoyamaTTMYIT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YouWMSEYPNOBSZF20,
author = {Yang You and
Glen A. Wiedemeier and
Chad Marquart and
Chris Steffen and
Erik English and
Dereje Yilma and
Thomas Pham and
Venkat Nammi and
Jeffrey Okyere and
Nathan Blanchard and
Akil Sutton and
Ze Zhang and
David Friend and
Diego Barba and
Tyler Bohlke and
Michael Spear and
Vikram Raj and
James Crugnale and
Daniel Dreps and
Pier Andrea Francese and
Marcel A. Kossel and
Thomas Morf},
title = {A 25{\texttimes}50Gb/s 2.22pJ/b {NRZ} {RX} with Dual-Bank and 3-Tap
Speculative {DFE} for Microprocessor Application in 7nm FinFET {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162821},
doi = {10.1109/VLSICIRCUITS18222.2020.9162821},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/YouWMSEYPNOBSZF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhangCS20,
author = {Yihan Zhang and
Filipe Arroyo Cardoso and
Kenneth L. Shepard},
title = {A 0.72 nW, 1 Sample/s Fully Integrated pH Sensor with 65.8 LSB/pH
Sensitivity},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163023},
doi = {10.1109/VLSICIRCUITS18222.2020.9163023},
timestamp = {Tue, 25 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhangCS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhangKBSBMF20,
author = {Huajun Zhang and
Shoubhik Karmakar and
Lucien J. Breems and
Quino Sandifort and
Marco Berkhout and
Kofi A. A. Makinwa and
Qinwen Fan},
title = {A -107.8 dB {THD+N} Low-EMI Multi-Level Class-D Audio Amplifier},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162793},
doi = {10.1109/VLSICIRCUITS18222.2020.9162793},
timestamp = {Mon, 26 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ZhangKBSBMF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhangLGWYQWPSO20,
author = {Yuncheng Zhang and
Bangan Liu and
Xiaofan Gu and
Chun Wang and
Kiyoshi Yanagisawa and
Junjun Qiu and
Yun Wang and
Jian Pang and
Atsushi Shirane and
Kenichi Okada},
title = {A 29{\%} {PAE} 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated
Injection-Locked {PLL}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162955},
doi = {10.1109/VLSICIRCUITS18222.2020.9162955},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhangLGWYQWPSO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhaoPPSC20,
author = {Wenda Zhao and
Chanmin Park and
Injun Park and
Nan Sun and
Youngcheol Chae},
title = {An Always-on 4{\texttimes} Compressive {VGA} {CMOS} Imager with 51pJ/Pixel
and {\textgreater}32dB {PSNR}},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162897},
doi = {10.1109/VLSICIRCUITS18222.2020.9162897},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhaoPPSC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhuWLYS20,
author = {Chengjie Zhu and
Yuhan Wen and
Tao Liu and
Haw Yang and
Kaushik Sengupta},
title = {A Packaged Ingestible Bio-Pill with 15-Pixel Multiplexed Fluorescence
Nucleic-Acid Sensor and Bi-Directional Wireless Interface for In-Vivo
Bio-Molecular Sensing},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163060},
doi = {10.1109/VLSICIRCUITS18222.2020.9163060},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhuWLYS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsic/2020,
title = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9146894/proceeding},
isbn = {978-1-7281-9942-9},
timestamp = {Mon, 24 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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