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@inproceedings{DBLP:conf/vts/Al-HarbiG98,
author = {Sultan M. Al{-}Harbi and
Sandeep K. Gupta},
title = {A Methodology for Transforming Memory Tests for In-System Testing
of Direct Mapped Cache Tags},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {394--400},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670897},
doi = {10.1109/VTEST.1998.670897},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Al-HarbiG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AzaisRBB98,
author = {Florence Aza{\"{\i}}s and
Michel Renovell and
Yves Bertrand and
J.{-}C. Bodin},
title = {Design-For-Testability for Switched-Current Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {370--375},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670892},
doi = {10.1109/VTEST.1998.670892},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AzaisRBB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Bhattacharya98,
author = {Debashis Bhattacharya},
title = {Hierarchical Test Access Architecture for Embedded Cores in an Integrated
Circuit},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {8--14},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670842},
doi = {10.1109/VTEST.1998.670842},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Bhattacharya98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Bose98,
author = {Pradip Bose},
title = {Performance Test Case Generation for Microprocessors},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {54--61},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670849},
doi = {10.1109/VTEST.1998.670849},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Bose98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChampacCF98,
author = {V{\'{\i}}ctor H. Champac and
Jos{\'{e}} Castillejos and
Joan Figueras},
title = {{IDDQ} Testing of Opens in {CMOS} SRAMs},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {106--111},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670856},
doi = {10.1109/VTEST.1998.670856},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChampacCF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChangTCWPM98,
author = {Jonathan T.{-}Y. Chang and
Chao{-}Wen Tseng and
Yi{-}Chin Chu and
Sanjay Wattal and
Mike Purtell and
Edward J. McCluskey},
title = {Experimental Results for {IDDQ} and {VLV} Testing},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {118--125},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670858},
doi = {10.1109/VTEST.1998.670858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChangTCWPM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CockburnK98,
author = {Bruce F. Cockburn and
Albert L.{-}C. Kwong},
title = {Transition Maximization Techniques for Enhancing the Two-Pattern Fault
Coverage of Pseudorandom Test Pattern Generators},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {430--439},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670905},
doi = {10.1109/VTEST.1998.670905},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CockburnK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CornoGPR98,
author = {Fulvio Corno and
Nicola Gaudenzi and
Paolo Prinetto and
Matteo Sonza Reorda},
title = {On the Identification of Optimal Cellular Automata for Built-In Self-Test
of Sequential Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {424--429},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670902},
doi = {10.1109/VTEST.1998.670902},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CornoGPR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CornoPRR98,
author = {Fulvio Corno and
Paolo Prinetto and
Maurizio Rebaudengo and
Matteo Sonza Reorda},
title = {A Test Pattern Generation Methodology for Low-Power Consumption},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {453--459},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670912},
doi = {10.1109/VTEST.1998.670912},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CornoPRR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT98,
author = {Debaleena Das and
Nur A. Touba},
title = {Synthesis of Circuits with Low-Cost Concurrent Error Detection Based
on Bose-Lin Codes},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {309--317},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670885},
doi = {10.1109/VTEST.1998.670885},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DasT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/FlottesPRV98,
author = {Marie{-}Lise Flottes and
R. Pires and
Bruno Rouzeyre and
Laurent Volpe},
title = {Low Cost Partial Scan Design: {A} High Level Synthesis Approach},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {332--340},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670887},
doi = {10.1109/VTEST.1998.670887},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/FlottesPRV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GarciaAHMR98,
author = {T. A. Garc{\'{\i}}a and
Antonio J. Acosta and
Jos{\'{e}} L. Huertas and
J. M. Mora and
J. Ramos},
title = {Self-Timed Boundary-Scan Cells for Multi-Chip Module Test},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {92--97},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670854},
doi = {10.1109/VTEST.1998.670854},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GarciaAHMR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoncalvesT98,
author = {Fernando M. Gon{\c{c}}alves and
Jo{\~{a}}o Paulo Teixeira},
title = {Sampling Techniques of Non-Equally Probable Faults in {VLSI} System},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {283--288},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670881},
doi = {10.1109/VTEST.1998.670881},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoncalvesT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoorH98,
author = {Ad J. van de Goor and
Said Hamdioui},
title = {Fault Models and Tests for Two-Port Memories},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {401--410},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670898},
doi = {10.1109/VTEST.1998.670898},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoorH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GuptaG98,
author = {Sandip Gupta and
Craig Gleason},
title = {Validation and Test Problems for Cross Talk Noise},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {322--323},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10016},
doi = {10.1109/VTS.1998.10016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GuptaG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HamzaogluP98,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {New Techniques for Deterministic Test Pattern Generation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {446--452},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670910},
doi = {10.1109/VTEST.1998.670910},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HamzaogluP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HeidelDHINSS98,
author = {David F. Heidel and
Sang H. Dhong and
H. Peter Hofstee and
Michael Immediato and
Kevin J. Nowka and
Joel Silberman and
Kevin Stawiasz},
title = {High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating
a 1 GHz Microprocessor},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {234--238},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670873},
doi = {10.1109/VTEST.1998.670873},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HeidelDHINSS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Heragu98,
author = {Keerthi Heragu},
title = {Where We Might Stumble with Embedded-System Test},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {470},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10010},
doi = {10.1109/VTS.1998.10010},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Heragu98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HertwigHW98,
author = {Andre Hertwig and
Sybille Hellebrand and
Hans{-}Joachim Wunderlich},
title = {Fast Self-Recovering Controllers},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {296--302},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670883},
doi = {10.1109/VTEST.1998.670883},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HertwigHW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IshidaHY98,
author = {Masahiro Ishida and
Dong Sam Ha and
Takahiro J. Yamaguchi},
title = {{COMPACT:} {A} Hybrid Method for Compressing Test Data},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {62--69},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670850},
doi = {10.1109/VTEST.1998.670850},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IshidaHY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IyengarCM98,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Brian T. Murray},
title = {Built-In Self Testing of Sequential Circuits Using Precomputed Test
Sets},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {418--423},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670900},
doi = {10.1109/VTEST.1998.670900},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IyengarCM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IyerB98,
author = {Madhu K. Iyer and
Michael L. Bushnell},
title = {Effect of Noise on Analog Circuit Testing},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {138--144},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670861},
doi = {10.1109/VTEST.1998.670861},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IyerB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KaramLBR98,
author = {Jean{-}Michel Karam and
Marcelo Lubaszewski and
R. D. Shawn Blanton and
Andrew Richardson},
title = {Testing {MEMS}},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {320--321},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10009},
doi = {10.1109/VTS.1998.10009},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KaramLBR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KarayiannisT98,
author = {Dimitrios Karayiannis and
Spyros Tragoudas},
title = {A Nonenumerative {ATPG} for Functionally Sensitizable Path Delay Faults},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {440--445},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670908},
doi = {10.1109/VTEST.1998.670908},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KarayiannisT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Kasten98,
author = {Jeffrey S. Kasten},
title = {An Introduction to {RF} Testing: Device, Method and System},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {462--469},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670913},
doi = {10.1109/VTEST.1998.670913},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Kasten98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KavousianosN98,
author = {Xrysovalantis Kavousianos and
Dimitris Nikolos},
title = {Novel Single and Double Output {TSC} Berger Code Checkers},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {348--353},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670889},
doi = {10.1109/VTEST.1998.670889},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KavousianosN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KosonockyBWHKABHHIJJPRS98,
author = {Stephen V. Kosonocky and
Arthur A. Bright and
Kevin W. Warren and
Ruud A. Haring and
Steve Klepner and
Sameh W. Asaad and
S. Basavaiah and
Bob Havreluk and
David F. Heidel and
Michael Immediato and
Keith A. Jenkins and
Rajiv V. Joshi and
Benjamin D. Parker and
T. V. Rajeevakumar and
Kevin Stawiasz},
title = {Designing a Testable System on a Chip},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {2--7},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670841},
doi = {10.1109/VTEST.1998.670841},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KosonockyBWHKABHHIJJPRS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Kuchukyan98,
author = {Arsen Kuchukyan},
title = {Estimation of Error Detection Probability and Latency of Checking
Methods for a Given Circuit under Check},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {362--369},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670891},
doi = {10.1109/VTEST.1998.670891},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Kuchukyan98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LechnerRHO98,
author = {Andreas Lechner and
Andrew Richardson and
B. Hermes and
Michael J. Ohletz},
title = {A Design for Testability Study on a High Performance Automatic Gain
Control Circuit},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {376--385},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670893},
doi = {10.1109/VTEST.1998.670893},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LechnerRHO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeNA98,
author = {Kyung Tek Lee and
Clay Nordquist and
Jacob A. Abraham},
title = {Automatic Test Pattern Generation for Crosstalk Glitches in Digital
Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {34--41},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670846},
doi = {10.1109/VTEST.1998.670846},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeNA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiangLC98,
author = {Hsing{-}Chung Liang and
Chung{-}Len Lee and
Jwu E. Chen},
title = {Partial Reset and Scan for Flip-Flops Based on States Requirement
for Test Generation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {341--347},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670888},
doi = {10.1109/VTEST.1998.670888},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LiangLC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LinPR98,
author = {Xijiang Lin and
Irith Pomeranz and
Sudhakar M. Reddy},
title = {On Removing Redundant Faults in Synchronous Sequential Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {168--175},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670865},
doi = {10.1109/VTEST.1998.670865},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LinPR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MaiuriM98,
author = {Ovidio V. Maiuri and
Will R. Moore},
title = {Implications of Voltage and Dimension Scaling on {CMOS} Testing: The
Multidimensional Testing Paradigm},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {22--27},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670844},
doi = {10.1109/VTEST.1998.670844},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MaiuriM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MajumdarKA98,
author = {Amitava Majumdar and
Michio Komoda and
Tim Ayres},
title = {Ground Bounce Considerations in {DC} Parametric Test Generation Using
Boundary Scan},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {86--91},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670853},
doi = {10.1109/VTEST.1998.670853},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/MajumdarKA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MajumderAB98,
author = {Subhashis Majumder and
Vishwani D. Agrawal and
Michael L. Bushnell},
title = {On Delay-Untestable Paths and Stuck-Fault Redundancy},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {194--199},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670868},
doi = {10.1109/VTEST.1998.670868},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MajumderAB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MasonM98,
author = {Ralph Mason and
Shing Ma},
title = {Mixed Signal {DFT} at GHz Frequencies},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {245--253},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670876},
doi = {10.1109/VTEST.1998.670876},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MasonM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MaxwellBNCN98,
author = {Peter C. Maxwell and
Steve Baird and
Wayne M. Needham and
Al Crouch and
Phil Nigh},
title = {Best Methods for At-Speed Testing?},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {460--461},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10015},
doi = {10.1109/VTS.1998.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MaxwellBNCN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Mazumder98,
author = {Pinaki Mazumder},
title = {Analysis of Failures in Deep Submicron {SRAM} Cells},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {184--187},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10000},
doi = {10.1109/VTS.1998.10000},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Mazumder98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MirandaDDAM98,
author = {Jos{\'{e}} M. Miranda and
Scott Davidson and
Peter Dziel and
Saman Adham and
Steve Millman},
title = {Test Reuse at System Level},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {318--319},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1998.10014},
doi = {10.1109/VTS.1998.10014},
timestamp = {Tue, 12 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MirandaDDAM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MoundanosA98,
author = {Dinos Moundanos and
Jacob A. Abraham},
title = {Using Verification Technology for Validation Coverage Analysis and
Test Generation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {254--259},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670877},
doi = {10.1109/VTEST.1998.670877},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MoundanosA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NordholzTOGNW98,
author = {Petra Nordholz and
Dieter Treytnar and
Jan Otterstedt and
Hartmut Grabinski and
Dirk Niggemeyer and
T. W. Williams},
title = {Signal Integrity Problems in Deep Submicron Arising from Interconnects
between Cores},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {28--33},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670845},
doi = {10.1109/VTEST.1998.670845},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/NordholzTOGNW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NouraniP98,
author = {Mehrdad Nourani and
Christos A. Papachristou},
title = {Parallelism in Structural Fault Testing of Embedded Cores},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {15--21},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670843},
doi = {10.1109/VTEST.1998.670843},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/NouraniP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ParthasarathyB98,
author = {Ganapathy Parthasarathy and
Michael L. Bushnell},
title = {Towards Simultaneous Delay-Fault Built-In Self-Test and Partial-Scan
Insertion},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {210--217},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670870},
doi = {10.1109/VTEST.1998.670870},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ParthasarathyB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PomeranzR98,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {On Synchronizing Sequences and Test Sequence Partitioning},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {158--167},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670864},
doi = {10.1109/VTEST.1998.670864},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PomeranzR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PomeranzR98a,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {Stuck-At Tuple-Detection: {A} Fault Model Based on Stuck-At Faults
for Improved Defect Coverage},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {289--295},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670882},
doi = {10.1109/VTEST.1998.670882},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PomeranzR98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PouyaT98,
author = {Bahram Pouya and
Nur A. Touba},
title = {Synthesis of Zero-Aliasing Elementary-Tree Space Compactors},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {70--77},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670851},
doi = {10.1109/VTEST.1998.670851},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PouyaT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PsarakisGPZ98,
author = {Mihalis Psarakis and
Dimitris Gizopoulos and
Antonis M. Paschalis and
Yervant Zorian},
title = {Robustly Testable Array Multipliers under Realistic Sequential Cell
Fault Model},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {152--157},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670863},
doi = {10.1109/VTEST.1998.670863},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PsarakisGPZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RajskiT98,
author = {Janusz Rajski and
Jerzy Tyszer},
title = {Design of Phase Shifters for {BIST} Applications},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {218--224},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670871},
doi = {10.1109/VTEST.1998.670871},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RajskiT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Savir98,
author = {Jacob Savir},
title = {Distributed Generation of Weighted Random Patterns},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {225--233},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670872},
doi = {10.1109/VTEST.1998.670872},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Savir98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SeurinS98,
author = {Markus Seuring and
Michael G{\"{o}}ssel and
Egor S. Sogomonyan},
title = {A Structural Approach for Space Compaction for Concurrent Checking
and {BIST}},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {354--361},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670890},
doi = {10.1109/VTEST.1998.670890},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SeurinS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShigetaI98,
author = {Kazuki Shigeta and
Toshio Ishiyama},
title = {A New Path Tracing Algorithm with Dynamic Circuit Extraction for Sequential
Circuit Fault Diagnosis},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {48--53},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670848},
doi = {10.1109/VTEST.1998.670848},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ShigetaI98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShinogiH98,
author = {Tsuyoshi Shinogi and
Terumine Hayashi},
title = {A Simple and Efficient Method for Generating Compact {IDDQ} Test Set
for Bridging Fault},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {112--117},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670857},
doi = {10.1109/VTEST.1998.670857},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ShinogiH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SidorowiczB98,
author = {Piotr R. Sidorowicz and
Janusz A. Brzozowski},
title = {An Approach to Modeling and Testing Memories and Its Application to
CAMs},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {411--417},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670899},
doi = {10.1109/VTEST.1998.670899},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SidorowiczB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SogomonyanSG98,
author = {Egor S. Sogomonyan and
Adit D. Singh and
Michael G{\"{o}}ssel},
title = {A Multi-Mode Scannable Memory Element for High Test Application Efficiency
and Delay Testing},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {324--331},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670886},
doi = {10.1109/VTEST.1998.670886},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SogomonyanSG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SparmannK98,
author = {Uwe Sparmann and
Lars K{\"{o}}ller},
title = {Improving Path Delay Fault Testability by Path Removal},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {200--209},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670869},
doi = {10.1109/VTEST.1998.670869},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SparmannK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Stroele98,
author = {Albrecht P. Stroele},
title = {Bit Serial Pattern Generation and Response Compaction Using Arithmetic
Functions},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {78--85},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670852},
doi = {10.1109/VTEST.1998.670852},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Stroele98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/StroudT98,
author = {Charles E. Stroud and
Joe K. Tannehill Jr.},
title = {Applying Built-In Self-Test to Majority Voting Fault Tolerant Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {303--308},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670884},
doi = {10.1109/VTEST.1998.670884},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/StroudT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SyllaSKHV98,
author = {Iboun Taimiya Sylla and
Mustapha Slamani and
Bozena Kaminska and
Fartoumi M. Hossein and
Patrick Vincent},
title = {Impedance Mismatch and Lumped Capacitance Effects in High Frequency
Testing},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {239--244},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670875},
doi = {10.1109/VTEST.1998.670875},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SyllaSKHV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TaniTFM98,
author = {Seiichiro Tani and
Mitsuo Teramoto and
Tomoo Fukazawa and
Kazuyoshi Matsuhiro},
title = {Efficient Path Selection for Delay Testing Based on Partial Path Evaluation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670867},
doi = {10.1109/VTEST.1998.670867},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TaniTFM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TianS98,
author = {Michael W. Tian and
C.{-}J. Richard Shi},
title = {Nonlinear Analog {DC} Fault Simulation by One-Step Relaxation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {126--131},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670859},
doi = {10.1109/VTEST.1998.670859},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TianS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VariyamC98,
author = {Pramodchandran N. Variyam and
Abhijit Chatterjee},
title = {Enhancing Test Effectiveness for Analog Circuits Using Synthesized
Measurements},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {132--137},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670860},
doi = {10.1109/VTEST.1998.670860},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VariyamC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VriesJ98,
author = {R. de Vries and
Augustus J. E. M. Janssen},
title = {Decreasing the Sensitivity of {ADC} Test Parameters by Means of Wobbling},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {386--393},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670894},
doi = {10.1109/VTEST.1998.670894},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VriesJ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangAZ98,
author = {Li{-}C. Wang and
Magdy S. Abadir and
Jing Zeng},
title = {On Logic and Transistor Level Design Error Detection of Various Validation
Approaches for PowerPC(tm) Microprocessor Arrays},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670878},
doi = {10.1109/VTEST.1998.670878},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/WangAZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WilliamsFL98,
author = {Douglas Williams and
F. Joel Ferguson and
Tracy Larrabee},
title = {A Study on the Utility of Using Expected Quality Level as a Design
for Testability Metric},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {274--282},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670880},
doi = {10.1109/VTEST.1998.670880},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/WilliamsFL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YanK98,
author = {Rongchang Yan and
Bruce C. Kim},
title = {A Novel Routing Algorithm for {MCM} Substrate Verification Using Single-Ended
Prob},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {266--273},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670879},
doi = {10.1109/VTEST.1998.670879},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YanK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YoonVCN98,
author = {Heebyung Yoon and
Pramodchandran N. Variyam and
Abhijit Chatterjee and
Naveena Nagi},
title = {Hierarchical Statistical Inference Model for Specification Based Testing
of Analog Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {145--151},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670862},
doi = {10.1109/VTEST.1998.670862},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YoonVCN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YotsuyanagiK98,
author = {Hiroyuki Yotsuyanagi and
Kozo Kinoshita},
title = {Undetectable Fault Removal of Sequential Circuits Based on Unreachable
States},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {176--183},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670866},
doi = {10.1109/VTEST.1998.670866},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YotsuyanagiK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZarrinehUS98,
author = {Kamran Zarrineh and
Shambhu J. Upadhyaya and
Philip Shephard III},
title = {Automatic Insertion of Scan Structures to Enhance Testability of Embedded
Memories, Cores and Chips},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {98--105},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670855},
doi = {10.1109/VTEST.1998.670855},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZarrinehUS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhaoML98,
author = {Jun Zhao and
Fred J. Meyer and
Fabrizio Lombardi},
title = {Fault Detection and Diagnosis of Interconnects of Random Access Memories},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670847},
doi = {10.1109/VTEST.1998.670847},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhaoML98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vts/1998,
title = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://ieeexplore.ieee.org/xpl/conhome/5496/proceeding},
isbn = {0-8186-8436-4},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/1998.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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