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@inproceedings{DBLP:conf/fpl/0002MLB15,
author = {Stephan Werner and
Leonard Masing and
Fabian Lesniak and
J{\"{u}}rgen Becker},
title = {Software-in-the-Loop simulation of embedded control applications based
on Virtual Platforms},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294020},
doi = {10.1109/FPL.2015.7294020},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/0002MLB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbdelfattahBYB15,
author = {Mohamed S. Abdelfattah and
Andrew Bitar and
Ange Yaghi and
Vaughn Betz},
title = {Design and simulation tools for Embedded NOCs on FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293965},
doi = {10.1109/FPL.2015.7293965},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AbdelfattahBYB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AdvaniTISN15,
author = {Siddharth Advani and
Yasuki Tanabe and
Kevin M. Irick and
Jack Sampson and
Vijaykrishnan Narayanan},
title = {A scalable architecture for multi-class visual object detection},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293961},
doi = {10.1109/FPL.2015.7293961},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AdvaniTISN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AhariET15,
author = {Ali Ahari and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Energy efficient partitioning of dynamic reconfigurable MRAM-FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293947},
doi = {10.1109/FPL.2015.7293947},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AhariET15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AhmadpourKA15,
author = {Iman Ahmadpour and
Behnam Khaleghi and
Hossein Asadi},
title = {An efficient reconfigurable architecture by characterizing most frequent
logic functions},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293953},
doi = {10.1109/FPL.2015.7293953},
timestamp = {Fri, 14 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AhmadpourKA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Alachiotis15,
author = {Nikolaos Alachiotis},
title = {Generating {FPGA} accelerators for chemical similarity assessment},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293977},
doi = {10.1109/FPL.2015.7293977},
timestamp = {Mon, 09 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Alachiotis15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlthoffK15,
author = {Alric Althoff and
Ryan Kastner},
title = {A scalable {FPGA} architecture for nonnegative least squares problems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293750},
doi = {10.1109/FPL.2015.7293750},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AlthoffK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AndradeGKNSIF15,
author = {Jo{\~{a}}o Andrade and
Nithin George and
Kimon Karras and
David Novo and
V{\'{\i}}tor Manuel Mendes da Silva and
Paolo Ienne and
Gabriel Falc{\~{a}}o Paiva Fernandes},
title = {From low-architectural expertise up to high-throughput non-binary
{LDPC} decoders: Optimization guidelines using high-level synthesis},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293940},
doi = {10.1109/FPL.2015.7293940},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AndradeGKNSIF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AyorindeQHC15,
author = {Oluseyi A. Ayorinde and
He Qi and
Yu Huang and
Benton H. Calhoun},
title = {Using island-style bi-directional intra-CLB routing in low-power FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--7},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293945},
doi = {10.1109/FPL.2015.7293945},
timestamp = {Thu, 14 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AyorindeQHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BelwalPT15,
author = {Meena Belwal and
Madhura Purnaprajna and
T. S. B. Sudarshan},
title = {Enabling seamless execution on hybrid {CPU/FPGA} systems: Challenges
{\&} directions},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294022},
doi = {10.1109/FPL.2015.7294022},
timestamp = {Mon, 06 Nov 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BelwalPT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BlockM15,
author = {Henry Block and
Tsutomu Maruyama},
title = {An {FPGA} implementation of a phylogenetic tree reconstruction algorithm
using an alternative second-pass optimization},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293973},
doi = {10.1109/FPL.2015.7293973},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BlockM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BostelmannS15,
author = {Timm Bostelmann and
Sergei Sawitzki},
title = {Towards a guided design flow for heterogeneous reconfigurable architectures},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293991},
doi = {10.1109/FPL.2015.7293991},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BostelmannS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BurovskiyGSL15,
author = {Pavel Burovskiy and
Paul Grigoras and
Spencer J. Sherwin and
Wayne Luk},
title = {Efficient assembly for high order unstructured {FEM} meshes},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293749},
doi = {10.1109/FPL.2015.7293749},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BurovskiyGSL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ButerOAMASB15,
author = {Wolfgang B{\"{u}}ter and
Alberto Garc{\'{\i}}a Ortiz and
A. Ali and
S. Mahmood and
S. Arefin and
V. V. Parsi Sreenivas and
R. B. Bergman},
title = {A rapid prototyping framework for nano-photonic accelerators},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294004},
doi = {10.1109/FPL.2015.7294004},
timestamp = {Wed, 24 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ButerOAMASB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CarloPTA15,
author = {Stefano Di Carlo and
Paolo Prinetto and
Pascal Trotta and
Jan Andersson},
title = {A portable open-source controller for safe Dynamic Partial Reconfiguration
on Xilinx FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294002},
doi = {10.1109/FPL.2015.7294002},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CarloPTA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChadjiminasKTMT15,
author = {Ioannis Chadjiminas and
Christos Kyrkou and
Theocharis Theocharides and
Maria K. Michael and
Christos Ttofis},
title = {In-field vulnerability analysis of hardware-accelerated computer vision
applications},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294003},
doi = {10.1109/FPL.2015.7294003},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ChadjiminasKTMT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChenL15,
author = {Qi Chen and
Qiang Liu},
title = {Pipelined NoC router architecture design with buffer configuration
exploration on {FPGA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293981},
doi = {10.1109/FPL.2015.7293981},
timestamp = {Tue, 21 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChenL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChenP15,
author = {Ren Chen and
Viktor K. Prasanna},
title = {Automatic generation of high throughput energy efficient streaming
architectures for arbitrary fixed permutations},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293944},
doi = {10.1109/FPL.2015.7293944},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChenP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CheungLS15,
author = {Peter Y. K. Cheung and
Wayne Luk and
Cristina Silvano},
title = {Preface},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293746},
doi = {10.1109/FPL.2015.7293746},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CheungLS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChuSK15,
author = {Thiem Van Chu and
Shimpei Sato and
Kenji Kise},
title = {Ultra-fast NoC emulation on a single {FPGA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294021},
doi = {10.1109/FPL.2015.7294021},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChuSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Cilardo15,
author = {Alessandro Cilardo},
title = {Variable-latency signed addition on FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293957},
doi = {10.1109/FPL.2015.7293957},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Cilardo15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CordeiroOV15,
author = {Rui Fiel Cordeiro and
Arnaldo S. R. Oliveira and
Jos{\'{e}} M. N. Vieira},
title = {FPGA-based all-digital transmitters},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293995},
doi = {10.1109/FPL.2015.7293995},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CordeiroOV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CordeiroPOCV15,
author = {Rui Fiel Cordeiro and
Andre Prata and
Arnaldo S. R. Oliveira and
Nuno Borges Carvalho and
Jos{\'{e}} M. N. Vieira},
title = {FPGA-based all-digital software defined radio system demonstration},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293970},
doi = {10.1109/FPL.2015.7293970},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CordeiroPOCV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DahirCTTT15,
author = {Nizar Dahir and
Pedro B. Campos and
Gianluca Tempesti and
Martin Trefzer and
Andrew M. Tyrrell},
title = {Characterisation of feasibility regions in FPGAs under adaptive {DVFS}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293998},
doi = {10.1109/FPL.2015.7293998},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DahirCTTT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DiamantopoulosX15,
author = {Dionysios Diamantopoulos and
Sotirios Xydis and
Kostas Siozios and
Dimitrios Soudris},
title = {High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators
on FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293992},
doi = {10.1109/FPL.2015.7293992},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DiamantopoulosX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DuB15,
author = {Chaohui Du and
Guoqiang Bai},
title = {Towards efficient discrete Gaussian sampling for lattice-based cryptography},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293949},
doi = {10.1109/FPL.2015.7293949},
timestamp = {Sat, 03 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DuB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DuarteVN15,
author = {Rui Policarpo Duarte and
M{\'{a}}rio P. V{\'{e}}stias and
Hor{\'{a}}cio C. Neto},
title = {Enhancing stochastic computations via process variation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--7},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293962},
doi = {10.1109/FPL.2015.7293962},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DuarteVN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FlemingBTCG15,
author = {Shane T. Fleming and
Ivan Beretta and
David B. Thomas and
George A. Constantinides and
Dan R. Ghica},
title = {PushPush: Seamless integration of hardware and software objects via
function calls over {AXI}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294024},
doi = {10.1109/FPL.2015.7294024},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FlemingBTCG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FraserMLTJL15,
author = {Nicholas J. Fraser and
Duncan J. M. Moss and
JunKyu Lee and
Stephen Tridgell and
Craig T. Jin and
Philip Heng Wai Leong},
title = {A fully pipelined kernel normalised least mean squares processor for
accelerated parameter optimisation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293952},
doi = {10.1109/FPL.2015.7293952},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FraserMLTJL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FristonSTG15,
author = {Sebastian Friston and
Anthony Steed and
Simon Tilbury and
Georgi Gaydadjiev},
title = {Ultra low latency dataflow renderer},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293974},
doi = {10.1109/FPL.2015.7293974},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FristonSTG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FusellaCM15,
author = {Edoardo Fusella and
Alessandro Cilardo and
Antonino Mazzeo},
title = {Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor
Systems-on-Chip},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293989},
doi = {10.1109/FPL.2015.7293989},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FusellaCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GeorgeLNOAOI15,
author = {Nithin George and
HyoukJoong Lee and
David Novo and
Muhsen Owaida and
David Andrews and
Kunle Olukotun and
Paolo Ienne},
title = {Automatic support for multi-module parallelism from computational
patterns},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294011},
doi = {10.1109/FPL.2015.7294011},
timestamp = {Sat, 01 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GeorgeLNOAOI15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GonzalezMLS15,
author = {Carlos Gonz{\'{a}}lez and
Daniel Mozos and
Sebasti{\'{a}}n L{\'{o}}pez and
Roberto Sarmiento},
title = {{FPGA} implementation to estimate the number of endmembers in hyperspectral
images},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293936},
doi = {10.1109/FPL.2015.7293936},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GonzalezMLS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GrigoreK15,
author = {Nicolae Bogdan Grigore and
Dirk Koch},
title = {Placing partially reconfigurable stream processing applications on
FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294001},
doi = {10.1109/FPL.2015.7294001},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GrigoreK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GuettatfiKK15,
author = {Zakarya Guettatfi and
Omar Kermia and
Abdelhakim Khouas},
title = {Over effective hard real-time hardware tasks scheduling and allocation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293994},
doi = {10.1109/FPL.2015.7293994},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GuettatfiKK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HooKH15,
author = {Chin Hau Hoo and
Akash Kumar and
Yajun Ha},
title = {ParaLaR: {A} parallel {FPGA} router based on Lagrangian relaxation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294012},
doi = {10.1109/FPL.2015.7294012},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HooKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HosseinabadyN15,
author = {Mohammad Hosseinabady and
Jos{\'{e}} Luis N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {Energy optimization of FPGA-based stream-oriented computing with power
gating},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293946},
doi = {10.1109/FPL.2015.7293946},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HosseinabadyN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HosseinabadyN15a,
author = {Mohammad Hosseinabady and
Jos{\'{e}} Luis N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {Optimised OpenCL workgroup synthesis for hybrid {ARM-FPGA} devices},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294016},
doi = {10.1109/FPL.2015.7294016},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HosseinabadyN15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HuangLR15,
author = {Jiasen Huang and
Weina Lu and
Junyan Ren},
title = {Greedy approach based heuristics for partitioning SpMxV on FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293988},
doi = {10.1109/FPL.2015.7293988},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HuangLR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HuangWDZSX15,
author = {Libo Huang and
Yongwen Wang and
Qiang Dou and
Chengyi Zhang and
Caixia Sun and
Chao Xu},
title = {Fast {FPGA} system for microarchitecture optimization on synthesizable
modern processor design},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294005},
doi = {10.1109/FPL.2015.7294005},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HuangWDZSX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Hung15,
author = {Eddie Hung},
title = {Mind the (synthesis) gap: Examining where academic {FPGA} tools lag
behind industry},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294007},
doi = {10.1109/FPL.2015.7294007},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Hung15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HurkatCNMR15,
author = {Skand Hurkat and
Jungwook Choi and
Eriko Nurvitadhi and
Jos{\'{e}} F. Mart{\'{\i}}nez and
Rob A. Rutenbar},
title = {Fast hierarchical implementation of sequential tree-reweighted belief
propagation for probabilistic inference},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293934},
doi = {10.1109/FPL.2015.7293934},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HurkatCNMR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IndacoLMT15,
author = {Marco Indaco and
Fabio Lauri and
Andrea Miele and
Pascal Trotta},
title = {An efficient many-core architecture for Elliptic Curve Cryptography
security assessment},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293950},
doi = {10.1109/FPL.2015.7293950},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/IndacoLMT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IrrgangP15,
author = {Kai{-}Uwe Irrgang and
Thomas B. Preu{\ss}er},
title = {An LZ77-style bit-level compression for trace data compaction},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294006},
doi = {10.1109/FPL.2015.7294006},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/IrrgangP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IstvanSA15,
author = {Zsolt Istv{\'{a}}n and
David Sidler and
Gustavo Alonso},
title = {Building a distributed key-value store with FPGA-based microservers},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293967},
doi = {10.1109/FPL.2015.7293967},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/IstvanSA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JaveedWS15,
author = {Khalid Javeed and
Xiaojun Wang and
Mike Scott},
title = {Serial and parallel interleaved modular multipliers on {FPGA} platform},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293986},
doi = {10.1109/FPL.2015.7293986},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JaveedWS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JiangZLNHYYI15,
author = {Zhenghong Jiang and
Grace Zgheib and
Colin Yu Lin and
David Novo and
Zhihong Huang and
Liqun Yang and
Haigang Yang and
Paolo Ienne},
title = {A technology mapper for depth-constrained {FPGA} logic cells},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294014},
doi = {10.1109/FPL.2015.7294014},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JiangZLNHYYI15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JunLXA15,
author = {Sang Woo Jun and
Ming Liu and
Shuotao Xu and
Arvind},
title = {A transport-layer network for distributed {FPGA} platforms},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293976},
doi = {10.1109/FPL.2015.7293976},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JunLXA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KapreG15,
author = {Nachiket Kapre and
Jan Gray},
title = {Hoplite: Building austere overlay NoCs for FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293956},
doi = {10.1109/FPL.2015.7293956},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KapreG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KapreKGMB15,
author = {Nachiket Kapre and
Jayakrishnan Selva Kumar and
Parjanya Gupta and
Sagar Shrishailappa Masuti and
Sylvain Barbot},
title = {Limits of {FPGA} acceleration of 3D Green's Function computation for
geophysical applications},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293942},
doi = {10.1109/FPL.2015.7293942},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KapreKGMB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KhanB15,
author = {Zia Uddin Ahamed Khan and
Mohammed Benaissa},
title = {High speed {ECC} implementation on {FPGA} over GF(2\({}^{\mbox{m}}\))},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293951},
doi = {10.1109/FPL.2015.7293951},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KhanB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KimA15,
author = {Jin Hee Kim and
Jason Helge Anderson},
title = {Synthesizable {FPGA} fabrics targetable by the Verilog-to-Routing
{(VTR)} {CAD} flow},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293955},
doi = {10.1109/FPL.2015.7293955},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KimA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KuharaTHA15,
author = {Takuya Kuhara and
Chiharu Tsuruta and
Toshihiro Hanawa and
Hideharu Amano},
title = {Reduction calculator in an {FPGA} based switching Hub for high performance
clusters},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293985},
doi = {10.1109/FPL.2015.7293985},
timestamp = {Fri, 30 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KuharaTHA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LehoczkyTS15,
author = {Zoltan Lehoczky and
Rich{\'{a}}rd T{\'{o}}th and
Krisztian Somogyi},
title = {High-level {FPGA} logic synthesis from .NET programs for software
developers},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293968},
doi = {10.1109/FPL.2015.7293968},
timestamp = {Fri, 16 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LehoczkyTS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LeongAABCDGHLLL15,
author = {Philip Heng Wai Leong and
Hideharu Amano and
Jason Helge Anderson and
Koen Bertels and
Jo{\~{a}}o M. P. Cardoso and
Oliver Diessel and
Guy Gogniat and
Mike Hutton and
JunKyu Lee and
Wayne Luk and
Patrick Lysaght and
Marco Platzner and
Viktor K. Prasanna and
Tero Rissa and
Cristina Silvano and
Hayden Kwok{-}Hay So and
Yu Wang},
title = {Significant papers from the first 25 years of the {FPL} conference},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293747},
doi = {10.1109/FPL.2015.7293747},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LeongAABCDGHLLL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiS15,
author = {Xiaotong Li and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
title = {Temperature-triggered behavioral IPs {HW} Trojan detection method
with FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294009},
doi = {10.1109/FPL.2015.7294009},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiangSWZ15,
author = {Hao Liang and
Sharad Sinha and
Rakesh Warrier and
Wei Zhang},
title = {Static hardware task placement on multi-context {FPGA} using hybrid
genetic algorithm},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293954},
doi = {10.1109/FPL.2015.7293954},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiangSWZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiangZSCL15,
author = {Hao Liang and
Wei Zhang and
Sharad Sinha and
Yi{-}Chung Chen and
Hai Li},
title = {Hierarchical library based power estimator for versatile FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293969},
doi = {10.1109/FPL.2015.7293969},
timestamp = {Thu, 08 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LiangZSCL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuTBT15,
author = {Xiaobin Liu and
Tedy Thomas and
Alan Boguslawski and
Russell Tessier},
title = {Adaptive MRAM-based CGRAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293984},
doi = {10.1109/FPL.2015.7293984},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuTBT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LlamoccaD15,
author = {Daniel Llamocca and
Brian K. Dean},
title = {A scalable pipelined architecture for biomimetic vision sensors},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293935},
doi = {10.1109/FPL.2015.7293935},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LlamoccaD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaAA15,
author = {Sen Ma and
Zeyad Aklah and
David Andrews},
title = {A run time interpretation approach for creating custom accelerators},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293996},
doi = {10.1109/FPL.2015.7293996},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MaAA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MasuyamaFOA15,
author = {Koichiro Masuyama and
Yu Fujita and
Hayate Okuhara and
Hideharu Amano},
title = {7MOPS/lemon-battery image processing demonstration with an ultra-low
power reconfigurable accelerator {CMA-SOTB-2}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293964},
doi = {10.1109/FPL.2015.7293964},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MasuyamaFOA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MemoryMW15,
author = {Tahsin Turker Mutlugun and
Sheng{-}De Wang},
title = {OpenCL computing on {FPGA} using multiported shared memory},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293983},
doi = {10.1109/FPL.2015.7293983},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MemoryMW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MillsZVZJ15,
author = {Aaron Mills and
Pei Zhang and
Sudhanshu Vyas and
Joseph Zambreno and
Phillip H. Jones},
title = {A software configurable coprocessor-based state-space controller},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293752},
doi = {10.1109/FPL.2015.7293752},
timestamp = {Thu, 11 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MillsZVZJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MinutoliCTF15,
author = {Marco Minutoli and
Vito Giovanni Castellana and
Antonino Tumeo and
Fabrizio Ferrandi},
title = {Inter-procedural resource sharing in High Level Synthesis through
function proxies},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293958},
doi = {10.1109/FPL.2015.7293958},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MinutoliCTF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NakaharaS15,
author = {Hiroki Nakahara and
Tsutomu Sasao},
title = {A deep convolutional neural network based on nested residue number
system},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293933},
doi = {10.1109/FPL.2015.7293933},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NakaharaS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NevesTR15,
author = {Nuno Neves and
Pedro Tom{\'{a}}s and
Nuno Roma},
title = {Efficient data-stream management for shared-memory many-core systems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293960},
doi = {10.1109/FPL.2015.7293960},
timestamp = {Sun, 11 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NevesTR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OanceaSGK15,
author = {Andrei{-}Dumitru Oancea and
Christian St{\"{u}}llein and
Jano Gebelein and
Udo Kebschull},
title = {A resilient, flash-free soft error mitigation concept for the CBM-ToF
read-out chain via {GBT-SCA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293999},
doi = {10.1109/FPL.2015.7293999},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/OanceaSGK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OomenNKC15,
author = {Roel Oomen and
Tuan D. A. Nguyen and
Akash Kumar and
Henk Corporaal},
title = {An automated technique to generate relocatable partial bitstreams
for Xilinx FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293980},
doi = {10.1109/FPL.2015.7293980},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/OomenNKC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Oppermann0YS15,
author = {Julian Oppermann and
Andreas Koch and
Ting Yu and
Oliver Sinnen},
title = {Domain-specific optimisation for the high-level synthesis of CellML-based
simulation accelerators},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--7},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294019},
doi = {10.1109/FPL.2015.7294019},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Oppermann0YS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PanjkovWOH15,
author = {Zdravko Panjkov and
Andreas Wasserbauer and
Timm Ostermann and
Richard Hagelauer},
title = {Hybrid {FPGA} debug approach},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294023},
doi = {10.1109/FPL.2015.7294023},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PanjkovWOH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PetelinB15,
author = {Oleg Petelin and
Vaughn Betz},
title = {Wotan: {A} tool for rapid evaluation of {FPGA} architecture routability
without benchmarks},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294008},
doi = {10.1109/FPL.2015.7294008},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PetelinB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Pfeifer15,
author = {Petr Pfeifer},
title = {AmBRAM\({}^{\mbox{s}}\) - An analysis tool, method and framework for
advanced measurements and reliability assessments on modern nanoscale
FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293963},
doi = {10.1109/FPL.2015.7293963},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Pfeifer15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PrataOC15,
author = {Andre Prata and
Arnaldo S. R. Oliveira and
Nuno Borges Carvalho},
title = {FPGA-based all-digital Software Defined Radio receiver},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293993},
doi = {10.1109/FPL.2015.7293993},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PrataOC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/QiAHC15,
author = {He Qi and
Oluseyi A. Ayorinde and
Yu Huang and
Benton H. Calhoun},
title = {Optimizing energy efficient low-swing interconnect for sub-threshold
FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293979},
doi = {10.1109/FPL.2015.7293979},
timestamp = {Thu, 14 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/QiAHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/QuP15,
author = {Yun Rock Qu and
Viktor K. Prasanna},
title = {Power-efficient range-match-based packet classification on {FPGA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293937},
doi = {10.1109/FPL.2015.7293937},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/QuP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RabieahB15,
author = {Mudhar Bin Rabieah and
Christos{-}Savvas Bouganis},
title = {{FPGA} based nonlinear Support Vector Machine training using an ensemble
learning},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293972},
doi = {10.1109/FPL.2015.7293972},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RabieahB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ResendeC15,
author = {Jo{\~{a}}o Carlos Resende and
Ricardo Chaves},
title = {Compact dual block {AES} core on {FPGA} for {CCM} Protocol},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293948},
doi = {10.1109/FPL.2015.7293948},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ResendeC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SeverensVHS15,
author = {Berg Severens and
Elias Vansteenkiste and
Karel Heyse and
Dirk Stroobandt},
title = {Estimating circuit delays in FPGAs after technology mapping},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294010},
doi = {10.1109/FPL.2015.7294010},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SeverensVHS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShaoGGCTLW15,
author = {Shengjia Shao and
Liucheng Guo and
Ce Guo and
Thomas C. P. Chau and
David B. Thomas and
Wayne Luk and
Stephen Weston},
title = {Recursive pipelined genetic propagation for bilevel optimisation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293943},
doi = {10.1109/FPL.2015.7293943},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ShaoGGCTLW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SogabeM15,
author = {Yoko Sogabe and
Tsutomu Maruyama},
title = {A variable length hash method for faster short read mapping on {FPGA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293938},
doi = {10.1109/FPL.2015.7293938},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SogabeM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Sotiriou-Xanthopoulos15,
author = {Efstathios Sotiriou{-}Xanthopoulos and
Sotirios Xydis and
Kostas Siozios and
George Economakos and
Dimitrios Soudris},
title = {Rapid prototyping and Design Space Exploration methodologies for many-accelerator
systems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293990},
doi = {10.1109/FPL.2015.7293990},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Sotiriou-Xanthopoulos15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TamiyaTIK15,
author = {Yutaka Tamiya and
Yoshinori Tomita and
Toshiyuki Ichiba and
Kaoru Kawamura},
title = {Data-triggered breakpoint for in-circuit debug without re-implementation},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293997},
doi = {10.1109/FPL.2015.7293997},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TamiyaTIK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TanOM15,
author = {Tze Hon Tan and
Chia Yee Ooi and
Muhammad N. Marsono},
title = {rrBox: {A} remote dynamically reconfigurable network processing middlebox},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293971},
doi = {10.1109/FPL.2015.7293971},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TanOM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TangGM15,
author = {Xifan Tang and
Pierre{-}Emmanuel Gaillardon and
Giovanni De Micheli},
title = {Accurate power analysis for near-Vt RRAM-based {FPGA}},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293982},
doi = {10.1109/FPL.2015.7293982},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TangGM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UmurogluMJ15,
author = {Yaman Umuroglu and
Donn Morrison and
Magnus Jahre},
title = {Hybrid breadth-first search on a single-chip {FPGA-CPU} heterogeneous
platform},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293939},
doi = {10.1109/FPL.2015.7293939},
timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/UmurogluMJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Valente15,
author = {Giacomo Valente},
title = {A framework for integrated monitoring of real-time embedded SoC},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293987},
doi = {10.1109/FPL.2015.7293987},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Valente15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VenierisMB15,
author = {Stylianos I. Venieris and
Grigorios Mingas and
Christos{-}Savvas Bouganis},
title = {Towards heterogeneous solvers for large-scale linear systems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293751},
doi = {10.1109/FPL.2015.7293751},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VenierisMB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WangHZ15,
author = {Ze{-}ke Wang and
Bingsheng He and
Wei Zhang},
title = {A study of data partitioning on OpenCL-based FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293941},
doi = {10.1109/FPL.2015.7293941},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WangHZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WeiszH15,
author = {Gabriel Weisz and
James C. Hoe},
title = {CoRAM++: Supporting data-structure-specific memory interfaces for
{FPGA} computing},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294017},
doi = {10.1109/FPL.2015.7294017},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WeiszH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WijtvlietFC15,
author = {Mark Wijtvliet and
Shakith Fernando and
Henk Corporaal},
title = {{SPINE:} From {C} loop-nests to highly efficient accelerators using
Algorithmic Species},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294015},
doi = {10.1109/FPL.2015.7294015},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WijtvlietFC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WonnebergerMCGE15,
author = {Stefan Wonneberger and
Peter M{\"{u}}hlfellner and
Pedro Ceriotti and
Thorsten Graf and
Rolf Ernst},
title = {Parallel feature extraction and heterogeneous object-detection for
multi-camera driver assistance systems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293975},
doi = {10.1109/FPL.2015.7293975},
timestamp = {Wed, 10 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WonnebergerMCGE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/XuGP15,
author = {Teng Xu and
Hongxiang Gu and
Miodrag Potkonjak},
title = {Data protection using recursive inverse function},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293978},
doi = {10.1109/FPL.2015.7293978},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/XuGP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/XueCYH15,
author = {Yuan Xue and
Patrick Cronin and
Chengmo Yang and
Jingtong Hu},
title = {Fine-tuning {CLB} placement to speed up reconfigurations in NVM-based
FPGAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294013},
doi = {10.1109/FPL.2015.7294013},
timestamp = {Mon, 06 Nov 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/XueCYH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/XueT15,
author = {Zeping Xue and
David B. Thomas},
title = {SysAlloc: {A} hardware manager for dynamic memory allocation in heterogeneous
systems},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--7},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293959},
doi = {10.1109/FPL.2015.7293959},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/XueT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YanJWZLW15,
author = {Jian Yan and
Jifang Jin and
Ying Wang and
Xuegong Zhou and
Philip H. W. Leong and
Lingli Wang},
title = {UniStream: {A} unified stream architecture combining configuration
and data processing},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294000},
doi = {10.1109/FPL.2015.7294000},
timestamp = {Tue, 19 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/YanJWZLW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YangFAWE15,
author = {Hsin{-}Jung Yang and
Kermin Fleming and
Michael Adler and
Felix Winterstein and
Joel S. Emer},
title = {Scavenger: Automating the construction of application-optimized memory
hierarchies},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7294018},
doi = {10.1109/FPL.2015.7294018},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YangFAWE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ZilbermanAKBZ015,
author = {Noa Zilberman and
Yury Audzevich and
Georgina Kalogeridou and
Neelakandan Manihatty Bojan and
Jingyun Zhang and
Andrew W. Moore},
title = {NetFPGA - rapid prototyping of high bandwidth devices in open source},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293966},
doi = {10.1109/FPL.2015.7293966},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ZilbermanAKBZ015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/2015,
title = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
publisher = {{IEEE}},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7284611/proceeding},
isbn = {978-0-9934-2800-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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