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ORCIDDarshana Jayasinghe
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Journal Articles
- 2024
[j6]Darshana Jayasinghe, Brian Udugama, Sri Parameswaran:
1LUTSensor: Detecting FPGA Voltage Fluctuations using LookUp Tables. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(1): 51-86 (2024)- 2022
- [j5]Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran:
VITI: A Tiny Self-Calibrating Sensor for Power-Variation Measurement in FPGAs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 657-678 (2022) - [j4]Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran
:
A Power to Pulse Width Modulation Sensor for Remote Power Analysis Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(4): 589-613 (2022) - 2021
- [j3]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
UCloD: Small Clock Delays to Mitigate Remote Power Analysis Attacks. IEEE Access 9: 108411-108425 (2021) - [j2]Darshana Jayasinghe, Aleksandar Ignjatovic, Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran:
QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks. ACM Trans. Design Autom. Electr. Syst. 26(5): 33:1-33:36 (2021) - 2013
- [j1]Jude Angelo Ambrose, Héctor Pettenghi, Darshana Jayasinghe, Leonel Sousa:
Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks. IET Circuits Devices Syst. 7(5): 283-293 (2013)
Conference and Workshop Papers
- 2024
- [c12]Brian Udugama, Darshana Jayasinghe, Sri Parameswaran:
Sensors for Remote Power Attacks: New Developments and Challenges. ASPDAC 2024: 333-340 - 2023
- [c11]Darshana Jayasinghe, Brian Udugama, Sri Parameswaran:
FPGA Based Countermeasures against Side Channel Attacks on Block Ciphers. ASP-DAC 2023: 365-371 - 2020
- [c10]Farah Abid, Darshana Jayasinghe, Sompasong Somsavaddy, Sri Parameswaran:
LFTSM: Lightweight and Fully Testable SEU Mitigation System for Xilinx Processor-Based SoCs. FPL 2020: 162-168 - 2019
- [c9]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
RFTC: Runtime Frequency Tuning Countermeasure Using FPGA Dynamic Reconfiguration to Mitigate Power Analysis Attacks. DAC 2019: 139 - [c8]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks. ICCAD 2019: 1-7 - 2017
- [c7]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks. VLSID 2017: 167-172 - 2016
- [c6]Darshana Jayasinghe, Shivam Bhasin, Sri Parameswaran, Aleksandar Ignjatovic:
Does it sound as it claims: a detailed side-channel security analysis of QuadSeal countermeasure. Conf. Computing Frontiers 2016: 449-454 - [c5]Eloi de Chérisey, Sylvain Guilley, Olivier Rioul, Darshana Jayasinghe:
Template Attacks with Partial Profiles and Dirichlet Priors: Application to Timing Attacks. HASP@ISCA 2016: 7:1-7:8 - 2015
- [c4]Darshana Jayasinghe, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran:
QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. CASES 2015: 21-30 - [c3]Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li, Sri Parameswaran:
Side channel attacks in embedded systems: A tale of hostilities and deterrence. ISQED 2015: 452-459 - 2014
- [c2]Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran:
Advanced modes in AES: Are they safe from power analysis based side channel attacks? ICCD 2014: 173-180 - 2011
- [c1]Ankita Arora, Sri Parameswaran, Roshan G. Ragel, Darshana Jayasinghe:
A Hardware/Software Countermeasure and a Testing Framework for Cache Based Side Channel Attacks. TrustCom 2011: 1005-1014
Informal and Other Publications
- 2014
- [i3]Darshana Jayasinghe, Roshan G. Ragel, Dhammika Elkaduwe:
Constant time encryption as a countermeasure against remote cache timing attacks. CoRR abs/1403.7293 (2014) - [i2]Janaka Alawatugoda, Darshana Jayasinghe, Roshan G. Ragel:
Countermeasures against Bernstein's remote cache timing attack. CoRR abs/1403.7297 (2014) - [i1]Hasindu Gamaarachchi, Roshan G. Ragel, Darshana Jayasinghe:
Accelerating Correlation Power Analysis Using Graphics Processing Units. CoRR abs/1412.7682 (2014)
Coauthor Index
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